DC-DC converter in modular structure for exploring power and voltage transient spikes /
A single module of boost converter is simulated using a two-transistor forward based topology. The 1:N step-up transformer proves to be an effective boosting element with galvanizing performance. The transistors are fitted with diode keeping the coil protected from spikes and fly-back related issues...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English |
| Published: |
Gombak, Selangor :
Kulliyyah of Engineering, International Islamic University Malaysia,
2016
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| Subjects: | |
| Online Access: | http://studentrepo.iium.edu.my/handle/123456789/4432 |
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| Summary: | A single module of boost converter is simulated using a two-transistor forward based topology. The 1:N step-up transformer proves to be an effective boosting element with galvanizing performance. The transistors are fitted with diode keeping the coil protected from spikes and fly-back related issues. Such configurations can be used in modular fashion reducing redundancy of power electronic circuit elements, ensuring better analysis with enhanced efficiency and performance, thus reducing design cost besides being embedded with hot swap features. Modules are stacked in parallel for applications of increased power rating or in series for increased output voltage requirements. The proposed modular strategy of Input-Series and Output-Series (ISOS) is chosen for its analysis under both the steady state and dynamic performance. The areas focused and explored in this research for the proposed configuration topology with regards to the switching transient spike and the resulting power or energy loss. The circuit is simulated using the Powersimtech PSIM with clearly state and emphasizing on the modularity and the switching transistor. The result obtained from the module using the two-transistor forward configuration show the output voltage levels for various duty cycles values. Three sets of duty cycle are determined by setting the duty cycle to be at 50% as the benchmark. Then, the duty cycle is set to 40% and 60%, which later on is compared to the benchmark duty cycle, giving the output as expected accordingly. Depending on the input voltage, ratio number of the transformer winding turns and the duty cycle, the output voltage shall be valid as long as the duty cycle is set at 50% and below. The voltage spike and the effect of the LC low pass filter are investigated by first determining using the TTF DC-DC converter topology. It shows that by increasing the inductor (maintain the capacitor) and increasing capacitor (maintain the inductor) value will produce less overshoot based on the measurement of the time taken for the output voltage to increase from 10% to 90% of maximum overshoot voltage. The ratio of L/C known as Q factor and the effect of switching frequency on the output waveform will be optimized as long as the value of inductor and capacitor are in large number which then will reduce overshoot time, but however at the same time, the factor of the bulky converter should also be considered. Considering the architecture connection of ISOS and ISOP, the power losses show to be of marginal difference from the inductive element (inductor) and also transformer winding, MOSFET and switching diode. However, the power loss is calculated (the rms value) 76% higher for the diode compared to the MOSFET. Hence, in order to mitigate the power losses are by using the fast recovery diode, small value of inductor and MOSFET with the RDS(ON) small. |
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| Physical Description: | xv, 73 leaves : ill. ; 30cm. |
| Bibliography: | Includes bibliographical references (leaves 71-73). |