A new carbon nanotube model for high performance logic gates circuit /
Aggressive scaling of complementary metal oxide semiconductor (CMOS) has led to higher and higher integration density, the higher performance of devices, low power consumption and more complex function. However, it will eventually reach its limit to nanoscale size in near future. As device sizes app...
Saved in:
| 主要作者: | |
|---|---|
| 格式: | Thesis |
| 語言: | English |
| 出版: |
Kuala Lumpur :
Kulliyyah of Engineering, International Islamic University Malaysia,
2016
|
| 主題: | |
| 在線閱讀: | Click here to view 1st 24 pages of the thesis. Members can view fulltext at the specified PCs in the library. |
| 標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|