APA (7th ed.) Citation

C., S. (2009). Design of 32-Bit Arithmetic Logic Unit Using Shannon Theorem Based Adder Approach.

Chicago Style (17th ed.) Citation

C., Senthilpari. Design of 32-Bit Arithmetic Logic Unit Using Shannon Theorem Based Adder Approach. 2009.

MLA (8th ed.) Citation

C., Senthilpari. Design of 32-Bit Arithmetic Logic Unit Using Shannon Theorem Based Adder Approach. 2009.

Warning: These citations may not always be 100% accurate.