APA引文

C., S. (2009). Design of 32-Bit Arithmetic Logic Unit Using Shannon Theorem Based Adder Approach.

Chicago Style (17th ed.) Citation

C., Senthilpari. Design of 32-Bit Arithmetic Logic Unit Using Shannon Theorem Based Adder Approach. 2009.

MLA引文

C., Senthilpari. Design of 32-Bit Arithmetic Logic Unit Using Shannon Theorem Based Adder Approach. 2009.

警告：這些引文格式不一定是100％准確.