Design of 32-Bit Arithmetic Logic Unit Using Shannon Theorem Based Adder Approach

This thesis proposes two new techniques for the design of full adder circuits namely, Mixed-Shannon and Shannon circuits. The Mixed-Shannon adder cell is developed using the MCIT for the sum operation and the Shannon based technique for the carry. In the second technique approach, the full adder cir...

Full description

Saved in:
Bibliographic Details
Main Author: C., Senthilpari
Format: Thesis
Published: 2009
Subjects:
Tags: Add Tag
No Tags, Be the first to tag this record!

Similar Items