Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits

This thesis investigates the proposed layout techniques that imitates the triple well process by doing it on the conventional process technology. This proposed layout is fabricated and the results show that the layout techniques managers to change the threshold voltage. However, there are certain is...

Full description

Saved in:

Bibliographic Details
Main Author:	Abdul Khalek, Mohd Faizal
Format:	Thesis
Published:	2009
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Tags:	Add Tag No Tags, Be the first to tag this record!

id	my-mmu-ep.376
record_format	uketd_dc
spelling	my-mmu-ep.3762010-06-04T04:30:06Z Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits 2009-05 Abdul Khalek, Mohd Faizal TK Electrical engineering. Electronics Nuclear engineering This thesis investigates the proposed layout techniques that imitates the triple well process by doing it on the conventional process technology. This proposed layout is fabricated and the results show that the layout techniques managers to change the threshold voltage. However, there are certain issues that need to be dealt with the drain current effects of the layout. 2009-05 Thesis http://shdl.mmu.edu.my/376/ http://vlib.mmu.edu.my/diglib/login/dlusr/login.php masters Multimedia University Research Library
institution	Multimedia University
collection	MMU Institutional Repository
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Abdul Khalek, Mohd Faizal Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits
description	This thesis investigates the proposed layout techniques that imitates the triple well process by doing it on the conventional process technology. This proposed layout is fabricated and the results show that the layout techniques managers to change the threshold voltage. However, there are certain issues that need to be dealt with the drain current effects of the layout.
format	Thesis
qualification_level	Master's degree
author	Abdul Khalek, Mohd Faizal
author_facet	Abdul Khalek, Mohd Faizal
author_sort	Abdul Khalek, Mohd Faizal
title	Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits
title_short	Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits
title_full	Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits
title_fullStr	Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits
title_full_unstemmed	Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits
title_sort	low power design and layout techniques for cmos mixed - signal circuits
granting_institution	Multimedia University
granting_department	Research Library
publishDate	2009
_version_	1747829119218876416

Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits

Similar Items