VHDL Modeling Of ATM To IP Conversion Chip

VHDL Modeling Of ATM To IP Conversion Chip

This project involves with ATM (Asynchronous Transfer Mode) technology and a method for incorporating it into existing computer networks based on the IP (Internet Protocol) standard. The objective of this project to model a computer chip that is able to convert ATM cells into IP packets and extract...

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Main Author: Chew, Beng Wah
Format: Thesis
Published: 2002
Subjects:
TK5101-6720 Telecommunication
Including telegraphy, telephone, radio, radar, television
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id my-mmu-ep.964
record_format uketd_dc
spelling my-mmu-ep.9642010-07-15T06:43:46Z VHDL Modeling Of ATM To IP Conversion Chip 2002-09 Chew, Beng Wah TK5101-6720 Telecommunication. Including telegraphy, telephone, radio, radar, television This project involves with ATM (Asynchronous Transfer Mode) technology and a method for incorporating it into existing computer networks based on the IP (Internet Protocol) standard. The objective of this project to model a computer chip that is able to convert ATM cells into IP packets and extracts the data from these IP packets, and it must also be reversible to split the IP data packets into small ATM cells. 2002-09 Thesis http://shdl.mmu.edu.my/964/ http://myto.perpun.net.my/metoalogin/logina.php masters Multimedia University Research Library
institution Multimedia University
collection MMU Institutional Repository
topic TK5101-6720 Telecommunication
Including telegraphy, telephone, radio, radar, television
spellingShingle TK5101-6720 Telecommunication
Including telegraphy, telephone, radio, radar, television
Chew, Beng Wah
VHDL Modeling Of ATM To IP Conversion Chip
description This project involves with ATM (Asynchronous Transfer Mode) technology and a method for incorporating it into existing computer networks based on the IP (Internet Protocol) standard. The objective of this project to model a computer chip that is able to convert ATM cells into IP packets and extracts the data from these IP packets, and it must also be reversible to split the IP data packets into small ATM cells.
format Thesis
qualification_level Master's degree
author Chew, Beng Wah
author_facet Chew, Beng Wah
author_sort Chew, Beng Wah
title VHDL Modeling Of ATM To IP Conversion Chip
title_short VHDL Modeling Of ATM To IP Conversion Chip
title_full VHDL Modeling Of ATM To IP Conversion Chip
title_fullStr VHDL Modeling Of ATM To IP Conversion Chip
title_full_unstemmed VHDL Modeling Of ATM To IP Conversion Chip
title_sort vhdl modeling of atm to ip conversion chip
granting_institution Multimedia University
granting_department Research Library
publishDate 2002
_version_ 1747829274243497984

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