Clock gating techniques using 0.18um CMOS technology / Muhammad Syafiq Ab Rahim
This thesis presents a study of clock gating techniques using 0.18um CMOS technology. The objective of this paper is to study the speed of the clock gating technique. Another objective of this paper is to study the power consumption of the clock gating technique. Today’s consumer demands more functi...
Saved in:
| 主要作者: | |
|---|---|
| 格式: | Thesis |
| 語言: | English |
| 出版: |
2011
|
| 在線閱讀: | https://ir.uitm.edu.my/id/eprint/102656/1/102656.pdf |
| 標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
成為第一個發表評論!