Digital neuron integrated circuit design for Feedforward Neural Network using Silterra 0.13 micrometer technology / Mohamad Faiz Omar Mahmud

Artificial Neural Networks (ANNs) is an interconnected group of neurons that uses a mathematical model for information processing often done using computational method. The neural network faces timing issues because it consists of many gates due to the repetition of neurons. This thesis presents the...

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Main Author: Mahmud, Mohamad Faiz Omar
Format: Thesis
Language:English
Published: 2012
Online Access:https://ir.uitm.edu.my/id/eprint/103003/1/103003.pdf
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spelling my-uitm-ir.1030032024-09-30T06:38:12Z Digital neuron integrated circuit design for Feedforward Neural Network using Silterra 0.13 micrometer technology / Mohamad Faiz Omar Mahmud 2012 Mahmud, Mohamad Faiz Omar Artificial Neural Networks (ANNs) is an interconnected group of neurons that uses a mathematical model for information processing often done using computational method. The neural network faces timing issues because it consists of many gates due to the repetition of neurons. This thesis presents the design and comparison of the neuron architecture between tree and ring structure in terms of functionality, usage of resources, total thermal power dissipation and timing analysis. Then, we perform the analysis of feedfoward neural network that consists of several. The objective of the project is to design a neuron on digital platform using hardware description language for their functionality and analysis purpose. The best structure will be implemented as integrated circuit. Neuron layout is designed using custom approach based on schematic from post synthesis done in Quartus II. IC design is designed using Cadence Design Systems Virtuoso targeted for Silterra 0.13 micrometer technology. Since both structures have tradeoffs in their advantages, we decide on the layout ring structure as it more reliable compared to tree in terms of delay. The number of resources usage for tree structure is 423 while the ring structure is 425. The delays of tree and ring structure are 29.047ns and 27.340ns respectively. The performance of neural network is dependent on the performance of neuron. The ring structure of neuron and neural network IC layout has a size of 680μmeter x 2493μ meter and 3211μ x 2351μ meter respectively 2012 Thesis https://ir.uitm.edu.my/id/eprint/103003/ https://ir.uitm.edu.my/id/eprint/103003/1/103003.pdf text en public degree Universiti Teknologi MARA Faculty of Electrical Engineering
institution Universiti Teknologi MARA
collection UiTM Institutional Repository
language English
description Artificial Neural Networks (ANNs) is an interconnected group of neurons that uses a mathematical model for information processing often done using computational method. The neural network faces timing issues because it consists of many gates due to the repetition of neurons. This thesis presents the design and comparison of the neuron architecture between tree and ring structure in terms of functionality, usage of resources, total thermal power dissipation and timing analysis. Then, we perform the analysis of feedfoward neural network that consists of several. The objective of the project is to design a neuron on digital platform using hardware description language for their functionality and analysis purpose. The best structure will be implemented as integrated circuit. Neuron layout is designed using custom approach based on schematic from post synthesis done in Quartus II. IC design is designed using Cadence Design Systems Virtuoso targeted for Silterra 0.13 micrometer technology. Since both structures have tradeoffs in their advantages, we decide on the layout ring structure as it more reliable compared to tree in terms of delay. The number of resources usage for tree structure is 423 while the ring structure is 425. The delays of tree and ring structure are 29.047ns and 27.340ns respectively. The performance of neural network is dependent on the performance of neuron. The ring structure of neuron and neural network IC layout has a size of 680μmeter x 2493μ meter and 3211μ x 2351μ meter respectively
format Thesis
qualification_level Bachelor degree
author Mahmud, Mohamad Faiz Omar
spellingShingle Mahmud, Mohamad Faiz Omar
Digital neuron integrated circuit design for Feedforward Neural Network using Silterra 0.13 micrometer technology / Mohamad Faiz Omar Mahmud
author_facet Mahmud, Mohamad Faiz Omar
author_sort Mahmud, Mohamad Faiz Omar
title Digital neuron integrated circuit design for Feedforward Neural Network using Silterra 0.13 micrometer technology / Mohamad Faiz Omar Mahmud
title_short Digital neuron integrated circuit design for Feedforward Neural Network using Silterra 0.13 micrometer technology / Mohamad Faiz Omar Mahmud
title_full Digital neuron integrated circuit design for Feedforward Neural Network using Silterra 0.13 micrometer technology / Mohamad Faiz Omar Mahmud
title_fullStr Digital neuron integrated circuit design for Feedforward Neural Network using Silterra 0.13 micrometer technology / Mohamad Faiz Omar Mahmud
title_full_unstemmed Digital neuron integrated circuit design for Feedforward Neural Network using Silterra 0.13 micrometer technology / Mohamad Faiz Omar Mahmud
title_sort digital neuron integrated circuit design for feedforward neural network using silterra 0.13 micrometer technology / mohamad faiz omar mahmud
granting_institution Universiti Teknologi MARA
granting_department Faculty of Electrical Engineering
publishDate 2012
url https://ir.uitm.edu.my/id/eprint/103003/1/103003.pdf
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