Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar

Scaling of complementary-metal-oxide-semiconductor (CMOS) transistor for higher performance device is nearly reaching its limit due to technology limitation issues. In this research, main objective is to incorporate a nanodevice called memristor into CMOS circuit as one alternative to overcome scali...

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Main Author:	Ajmal Mokhtar, Siti Musliha
Format:	Thesis
Language:	English
Published:	2016
Online Access:	https://ir.uitm.edu.my/id/eprint/17788/2/TM_SITI%20MUSLIHA%20AJMAL%20MOKHTAR%20EE%2016_5.pdf
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id	my-uitm-ir.17788
record_format	uketd_dc
spelling	my-uitm-ir.177882018-10-05T07:17:10Z Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar 2016 Ajmal Mokhtar, Siti Musliha Scaling of complementary-metal-oxide-semiconductor (CMOS) transistor for higher performance device is nearly reaching its limit due to technology limitation issues. In this research, main objective is to incorporate a nanodevice called memristor into CMOS circuit as one alternative to overcome scaling limitation due to memristor fabrication is compatible with CMOS. The first requirement in this research is to develop SPICE model for memristor in circuit simulation. Research starts with model selection and validation through comparison with fabricated memristor sample followed by model development in LTSPICE. In this research, memristor applications are investigated from both digital and analog memristor resistance switching. For digital, memristor-based logic modules are invested. For analog, a novel design of programmable delay element (PDE) using memristor is proposed. A case study of implementing the proposed PDE in delay locked loop (DLL) is also discussed. For model development, OSM model is validated and has most comparable behavior withb sample. Next, hybrid memristor-based logic gates (AND, NAND, OR, NOR) designs and operation results are discussed. They showed similar operation with CMOS logic. Hybrid XOR shows 88% less area consumption compared to fully CMOS XOR thus supports the main objective. However, hybrid logics have dynamic behavior at output caused by slow memristor switching speed. Speed can be increased through thinner thin film and higher voltage supply. Finally, the proposed PDE showed delays that are programmed by adjusting memristor resistance. Case study of DLL proved proposed design functionality in more complex system. However, it consumes more area than CMOS DLL. 2016 Thesis https://ir.uitm.edu.my/id/eprint/17788/ https://ir.uitm.edu.my/id/eprint/17788/2/TM_SITI%20MUSLIHA%20AJMAL%20MOKHTAR%20EE%2016_5.pdf text en public mphil masters Universiti Teknologi MARA Faculty of Electrical Engineering
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
description	Scaling of complementary-metal-oxide-semiconductor (CMOS) transistor for higher performance device is nearly reaching its limit due to technology limitation issues. In this research, main objective is to incorporate a nanodevice called memristor into CMOS circuit as one alternative to overcome scaling limitation due to memristor fabrication is compatible with CMOS. The first requirement in this research is to develop SPICE model for memristor in circuit simulation. Research starts with model selection and validation through comparison with fabricated memristor sample followed by model development in LTSPICE. In this research, memristor applications are investigated from both digital and analog memristor resistance switching. For digital, memristor-based logic modules are invested. For analog, a novel design of programmable delay element (PDE) using memristor is proposed. A case study of implementing the proposed PDE in delay locked loop (DLL) is also discussed. For model development, OSM model is validated and has most comparable behavior withb sample. Next, hybrid memristor-based logic gates (AND, NAND, OR, NOR) designs and operation results are discussed. They showed similar operation with CMOS logic. Hybrid XOR shows 88% less area consumption compared to fully CMOS XOR thus supports the main objective. However, hybrid logics have dynamic behavior at output caused by slow memristor switching speed. Speed can be increased through thinner thin film and higher voltage supply. Finally, the proposed PDE showed delays that are programmed by adjusting memristor resistance. Case study of DLL proved proposed design functionality in more complex system. However, it consumes more area than CMOS DLL.
format	Thesis
qualification_name	Master of Philosophy (M.Phil.)
qualification_level	Master's degree
author	Ajmal Mokhtar, Siti Musliha
spellingShingle	Ajmal Mokhtar, Siti Musliha Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar
author_facet	Ajmal Mokhtar, Siti Musliha
author_sort	Ajmal Mokhtar, Siti Musliha
title	Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar
title_short	Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar
title_full	Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar
title_fullStr	Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar
title_full_unstemmed	Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar
title_sort	memristor switching model for digital and analog circuits / siti musliha ajmal mokhtar
granting_institution	Universiti Teknologi MARA
granting_department	Faculty of Electrical Engineering
publishDate	2016
url	https://ir.uitm.edu.my/id/eprint/17788/2/TM_SITI%20MUSLIHA%20AJMAL%20MOKHTAR%20EE%2016_5.pdf
_version_	1783733598879219712

Memristor switching model for digital and analog circuits / Siti Musliha Ajmal Mokhtar

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