Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli

This thesis presents the simulation of a BPSK (Binary Phase Shift Keying)modulation using a Xilinx ISE (Integrated Synthesis Environment) and a Xilinx System Generator development tool and implementation in a FPGA Xilinx Spartan-3FPGA (Field Programmable Gate Array) development board. This thesis de...

Full description

Saved in:

Bibliographic Details
Main Author:	Ramli, Khairul Faizal
Format:	Thesis
Language:	English
Published:	2009
Subjects:	Applications of electric power
Online Access:	https://ir.uitm.edu.my/id/eprint/67655/1/67655.PDF
Tags:	Add Tag No Tags, Be the first to tag this record!

id	my-uitm-ir.67655
record_format	uketd_dc
spelling	my-uitm-ir.676552022-10-20T04:39:20Z Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli 2009 Ramli, Khairul Faizal Applications of electric power This thesis presents the simulation of a BPSK (Binary Phase Shift Keying)modulation using a Xilinx ISE (Integrated Synthesis Environment) and a Xilinx System Generator development tool and implementation in a FPGA Xilinx Spartan-3FPGA (Field Programmable Gate Array) development board. This thesis describes a methodology for top-down design, modeling, synthesize and simulation of BPSK modulation using (VHDL) Very High Speed Integrated Circuit Hardware Description Language. 2009 Thesis https://ir.uitm.edu.my/id/eprint/67655/ https://ir.uitm.edu.my/id/eprint/67655/1/67655.PDF text en public degree Universiti Teknologi Mara (UiTM) Faculty of Electrical Engineering Haron, Muhammad Adib
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
advisor	Haron, Muhammad Adib
topic	Applications of electric power
spellingShingle	Applications of electric power Ramli, Khairul Faizal Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli
description	This thesis presents the simulation of a BPSK (Binary Phase Shift Keying)modulation using a Xilinx ISE (Integrated Synthesis Environment) and a Xilinx System Generator development tool and implementation in a FPGA Xilinx Spartan-3FPGA (Field Programmable Gate Array) development board. This thesis describes a methodology for top-down design, modeling, synthesize and simulation of BPSK modulation using (VHDL) Very High Speed Integrated Circuit Hardware Description Language.
format	Thesis
qualification_level	Bachelor degree
author	Ramli, Khairul Faizal
author_facet	Ramli, Khairul Faizal
author_sort	Ramli, Khairul Faizal
title	Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli
title_short	Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli
title_full	Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli
title_fullStr	Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli
title_full_unstemmed	Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli
title_sort	dynamic reconfigurable bpsk modulation scheme using vhdl / khairul faizal ramli
granting_institution	Universiti Teknologi Mara (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2009
url	https://ir.uitm.edu.my/id/eprint/67655/1/67655.PDF
_version_	1783735710133518336

Dynamic reconfigurable BPSK modulation scheme using VHDL / Khairul Faizal Ramli

Similar Items