Hardware design of convolutional encoder and decoder for digital communication system / Sayed Aziz Sayed Hussin
This paper focused on Convolutional Codes as one of the error detection and correction technique that use special generator polynomial. The first generator polynomial is X3 +X*+ X1 + 1 (1111) and the second generator polynomial is X3 + X2 + 1 (1011). The simulation is performing using Circuit Maker...
Saved in:
Main Author: | Sayed Hussin, Sayed Aziz |
---|---|
Format: | Thesis |
Language: | English |
Published: |
2003
|
Subjects: | |
Online Access: | https://ir.uitm.edu.my/id/eprint/68030/1/68030.pdf |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Terrestrial Digital Video Broadcasting (DVB-T) coverage planning and performance evaluation in Shah Alam / Shahrolhafiz Sayed Ibrahim
by: Sayed Ibrahim, Shahrolhafiz
Published: (2014) -
Auditors’ job performance: the effects of job autonomy and role ambiguity / Syed Redzwan Sayed Rohani
by: Sayed Rohani, Syed Redzwan
Published: (2013) -
Enzymatic hydrolysis and modelling of fermentable sugar production from kitchen waste / Sharifah Iziuna Sayed Jamaludin
by: Sayed Jamaludin, Sharifah Iziuna
Published: (2014) -
Determining the indicators for Islamic personal wellbeing index from Muslim perspectives / Sharifah Adlina Tuan Sayed Amran
by: Tuan Sayed Amran, Sharifah Adlina
Published: (2020) -
Image coding with convolutional code using viterbi decoder /
by: Ibraheem, Rafal Tarik
Published: (2009)