Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof

This thesis presents design of a phase-locked loop (PLL) at operating frequencies from 46 MHz to 48 MHz for a weather satellite image receiver. The main objective of the designed PLL is to assist the receiver system to track a radio frequency (RF) signal transmitted from the National Oceanic and Atm...

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Bibliographic Details
Main Author:	Mohd Yusof, Siti Najihah
Format:	Thesis
Language:	English
Published:	2009
Subjects:	Communication of technical information
Online Access:	https://ir.uitm.edu.my/id/eprint/68994/1/68994.pdf
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id	my-uitm-ir.68994
record_format	uketd_dc
spelling	my-uitm-ir.689942023-03-13T00:10:38Z Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof 2009 Mohd Yusof, Siti Najihah Communication of technical information This thesis presents design of a phase-locked loop (PLL) at operating frequencies from 46 MHz to 48 MHz for a weather satellite image receiver. The main objective of the designed PLL is to assist the receiver system to track a radio frequency (RF) signal transmitted from the National Oceanic and Atmospheric Administration (NOAA) satellite which has been down-converted to frequency modulation (FM) frequency 90.7 MHz. The PLL is part of a low cost ground receiving system for Automatic Picture Transmission (APT) image reception. The PLL software was designed and compiled using CCS C compiler and used Peripheral Interface Controller 16F84A (PIC16F84A) as the microcontroller while the PLL hardware was designed and then fabricated on a printed circuit board (PCB) using Protel DXP 2004. The PCB design layout for the PLL was also constructed by using Protel DXP 2004. For the practical testing of the PLL a 12V DC supply, a 9V DC supply and a spectrum analyzer are used to verify the functionality of the designed PLL. From the measurement, the PLL is recorded to operate at the desired frequencies. 2009 Thesis https://ir.uitm.edu.my/id/eprint/68994/ https://ir.uitm.edu.my/id/eprint/68994/1/68994.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering Awang, Robia'tun Adayiah
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
advisor	Awang, Robia'tun Adayiah
topic	Communication of technical information
spellingShingle	Communication of technical information Mohd Yusof, Siti Najihah Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof
description	This thesis presents design of a phase-locked loop (PLL) at operating frequencies from 46 MHz to 48 MHz for a weather satellite image receiver. The main objective of the designed PLL is to assist the receiver system to track a radio frequency (RF) signal transmitted from the National Oceanic and Atmospheric Administration (NOAA) satellite which has been down-converted to frequency modulation (FM) frequency 90.7 MHz. The PLL is part of a low cost ground receiving system for Automatic Picture Transmission (APT) image reception. The PLL software was designed and compiled using CCS C compiler and used Peripheral Interface Controller 16F84A (PIC16F84A) as the microcontroller while the PLL hardware was designed and then fabricated on a printed circuit board (PCB) using Protel DXP 2004. The PCB design layout for the PLL was also constructed by using Protel DXP 2004. For the practical testing of the PLL a 12V DC supply, a 9V DC supply and a spectrum analyzer are used to verify the functionality of the designed PLL. From the measurement, the PLL is recorded to operate at the desired frequencies.
format	Thesis
qualification_level	Bachelor degree
author	Mohd Yusof, Siti Najihah
author_facet	Mohd Yusof, Siti Najihah
author_sort	Mohd Yusof, Siti Najihah
title	Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof
title_short	Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof
title_full	Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof
title_fullStr	Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof
title_full_unstemmed	Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof
title_sort	designing a phase-locked loop for a weather satellite image receiver / siti najihah mohd yusof
granting_institution	Universiti Teknologi MARA (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2009
url	https://ir.uitm.edu.my/id/eprint/68994/1/68994.pdf
_version_	1783735829130117120

Designing a phase-locked loop for a weather satellite image receiver / Siti Najihah Mohd Yusof

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