Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe

For some decades, power quality did not cause any problem, because it had no effect on most of the loads connected to the electric distribution system. When an induction motor is subjected to voltage sag, the motor still operates but with a lower output until the sag ends. With the increased use of...

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Main Author:	Safe, Mohd Norhalim
Format:	Thesis
Language:	English
Published:	2010
Subjects:	Electronics
Online Access:	https://ir.uitm.edu.my/id/eprint/78087/1/78087.pdf
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id	my-uitm-ir.78087
record_format	uketd_dc
spelling	my-uitm-ir.780872023-07-20T02:20:08Z Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe 2010 Safe, Mohd Norhalim Electronics For some decades, power quality did not cause any problem, because it had no effect on most of the loads connected to the electric distribution system. When an induction motor is subjected to voltage sag, the motor still operates but with a lower output until the sag ends. With the increased use of sophisticated electronics, high efficiency variable speed drive, and power electronic controller, power quality has become an increasing concern to utilities and customers. Voltage sags is the most common type of power quality disturbance in the distribution system. It can be caused by fault in the electrical network or by the starting of a large induction motor. This project intends to investigate mitigation technique that is suitable for different type of voltage sags source with different type of loads. The simulation will be using PSCAD/EMTDC software. The mitigation techniques that will be studied are Dynamic Voltage Restorer (DVR), Distribution Static Compensator (DSTATCOM) and Solid State Transfer Switch (SSTS). All the mitigation techniques will be tested on different type of faults. The analysis will focus on the effectiveness of these techniques in mitigating the voltage sags. The study will also investigate the effects of using the techniques to voltage sag magnitude. At the end of the project it is expected that a few suggestions can be made on the suitability of the techniques. 2010 Thesis https://ir.uitm.edu.my/id/eprint/78087/ https://ir.uitm.edu.my/id/eprint/78087/1/78087.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering Salimin, Rahmatul Hidayah
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
advisor	Salimin, Rahmatul Hidayah
topic	Electronics
spellingShingle	Electronics Safe, Mohd Norhalim Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe
description	For some decades, power quality did not cause any problem, because it had no effect on most of the loads connected to the electric distribution system. When an induction motor is subjected to voltage sag, the motor still operates but with a lower output until the sag ends. With the increased use of sophisticated electronics, high efficiency variable speed drive, and power electronic controller, power quality has become an increasing concern to utilities and customers. Voltage sags is the most common type of power quality disturbance in the distribution system. It can be caused by fault in the electrical network or by the starting of a large induction motor. This project intends to investigate mitigation technique that is suitable for different type of voltage sags source with different type of loads. The simulation will be using PSCAD/EMTDC software. The mitigation techniques that will be studied are Dynamic Voltage Restorer (DVR), Distribution Static Compensator (DSTATCOM) and Solid State Transfer Switch (SSTS). All the mitigation techniques will be tested on different type of faults. The analysis will focus on the effectiveness of these techniques in mitigating the voltage sags. The study will also investigate the effects of using the techniques to voltage sag magnitude. At the end of the project it is expected that a few suggestions can be made on the suitability of the techniques.
format	Thesis
qualification_level	Bachelor degree
author	Safe, Mohd Norhalim
author_facet	Safe, Mohd Norhalim
author_sort	Safe, Mohd Norhalim
title	Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe
title_short	Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe
title_full	Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe
title_fullStr	Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe
title_full_unstemmed	Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe
title_sort	voltage sags mitigation technique using pscad/emtdc / mohd norhalim safe
granting_institution	Universiti Teknologi MARA (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2010
url	https://ir.uitm.edu.my/id/eprint/78087/1/78087.pdf
_version_	1783736209006133248

Voltage sags mitigation technique using PSCAD/EMTDC / Mohd Norhalim Safe

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