Design of low-voltage low-power bulk-driven CMOS current conveyors / Wan Nur 'Izzatil Akmar Wan Hussin
The last few decades, a high attention has been paid to low-voltage (LV) lowpower (LP) integrated circuits design, especially, in the environment of portable systems where allow supply voltage given by a single-cell battery are required[l]. This work has mainly focused on circuit design techniques t...
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| 格式: | Thesis |
| 语言: | English |
| 出版: |
2014
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| 主题: | |
| 在线阅读: | https://ir.uitm.edu.my/id/eprint/98389/1/98389.PDF |
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| 总结: | The last few decades, a high attention has been paid to low-voltage (LV) lowpower (LP) integrated circuits design, especially, in the environment of portable systems where allow supply voltage given by a single-cell battery are required[l]. This work has mainly focused on circuit design techniques that would permit the implementation of current-conveyor of second's generation (CCII) at low voltage supply voltages in CMOS technology. The CCII can be considered as the basic circuit block because all the active devices can be made by a suitable connection of one or two CCIIs. This paper is devoted to the bulk-driven principle and utilized this principle to design LV LP CCII. The second generation current conveyor (CCII) is one of the most versatile current-mode building block for many applications, a high impedance input port is preferable in order to avoid loading effect. So, second generation current conveyor was developed to fulfil this requirement. It has one high and one low impedance input port rather than the two low impedance input ports of CCI. The designs of this project were simulated and analyzed in LTspice IV software. |
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