Design of 8T SRAM and sense amplifier 0.18um CMOS technology / Rozita Muhammad
In this work, an 8T SRAM operation and sense amplifier will be designed for 0.18um CMOS technology. The operation of SRAM is to retain data content as long as electric power is supplied to the memory devices, and do not process for rewrite or refresh data. Also, the SRAM cell is preferred because of...
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my-uitm-ir.983902024-08-04T15:16:59Z Design of 8T SRAM and sense amplifier 0.18um CMOS technology / Rozita Muhammad 2013 Muhammad, Rozita Q Science (General) In this work, an 8T SRAM operation and sense amplifier will be designed for 0.18um CMOS technology. The operation of SRAM is to retain data content as long as electric power is supplied to the memory devices, and do not process for rewrite or refresh data. Also, the SRAM cell is preferred because of its low power operation. The performance of SRAM is measured by its static noise margin - a measure of the cell's stability to retain it's the data state. While for the sense amplifier, it is used to translate small differential voltage to a full logic signal that can be further used digital logic. The choice and design of a sense amplifier in this work will define the robustness of bit line sensing, so it will impact the read speed and power. 2013 Thesis https://ir.uitm.edu.my/id/eprint/98390/ https://ir.uitm.edu.my/id/eprint/98390/1/98390.PDF text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering |
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Universiti Teknologi MARA |
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UiTM Institutional Repository |
| language |
English |
| topic |
Q Science (General) |
| spellingShingle |
Q Science (General) Muhammad, Rozita Design of 8T SRAM and sense amplifier 0.18um CMOS technology / Rozita Muhammad |
| description |
In this work, an 8T SRAM operation and sense amplifier will be designed for 0.18um CMOS technology. The operation of SRAM is to retain data content as long as electric power is supplied to the memory devices, and do not process for rewrite or refresh data. Also, the SRAM cell is preferred because of its low power operation. The performance of SRAM is measured by its static noise margin - a measure of the cell's stability to retain it's the data state. While for the sense amplifier, it is used to translate small differential voltage to a full logic signal that can be further used digital logic. The choice and design of a sense amplifier in this work will define the robustness of bit line sensing, so it will impact the read speed and power. |
| format |
Thesis |
| qualification_level |
Bachelor degree |
| author |
Muhammad, Rozita |
| author_facet |
Muhammad, Rozita |
| author_sort |
Muhammad, Rozita |
| title |
Design of 8T SRAM and sense amplifier 0.18um CMOS technology / Rozita Muhammad |
| title_short |
Design of 8T SRAM and sense amplifier 0.18um CMOS technology / Rozita Muhammad |
| title_full |
Design of 8T SRAM and sense amplifier 0.18um CMOS technology / Rozita Muhammad |
| title_fullStr |
Design of 8T SRAM and sense amplifier 0.18um CMOS technology / Rozita Muhammad |
| title_full_unstemmed |
Design of 8T SRAM and sense amplifier 0.18um CMOS technology / Rozita Muhammad |
| title_sort |
design of 8t sram and sense amplifier 0.18um cmos technology / rozita muhammad |
| granting_institution |
Universiti Teknologi MARA (UiTM) |
| granting_department |
Faculty of Electrical Engineering |
| publishDate |
2013 |
| url |
https://ir.uitm.edu.my/id/eprint/98390/1/98390.PDF |
| _version_ |
1811768912564453376 |