Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria

This thesis present the design of a high performance on-chip comparator of 8-bit Analogue-To-Digital Converter (ADC) has been designed in a 0.35µm Complementary Metal Oxide Semiconductor (CMOS) Technology process. Full custom design flow is implemented in which the design starts with schematic entry...

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Main Author:	Tuan Zakaria, Tengku Zairi Ezwa
Format:	Thesis
Language:	English
Published:	2010
Subjects:	Applications of electronics
Online Access:	https://ir.uitm.edu.my/id/eprint/98857/1/98857.pdf
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id	my-uitm-ir.98857
record_format	uketd_dc
spelling	my-uitm-ir.988572024-08-05T03:16:39Z Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria 2010 Tuan Zakaria, Tengku Zairi Ezwa Applications of electronics This thesis present the design of a high performance on-chip comparator of 8-bit Analogue-To-Digital Converter (ADC) has been designed in a 0.35µm Complementary Metal Oxide Semiconductor (CMOS) Technology process. Full custom design flow is implemented in which the design starts with schematic entry followed by simulation for characterization purpose and validation. The IC layout of the comparator is achieved along with the post layout simulation and layout verification. The designed comparator is tested in an 8-bit ADC by simulation to determine the functionality and performance. The comparator can handle positive and negative input signals. A polarity signal changes the polarity of the threshold level and makes the output signal always active high. The design is based on basic comparator architecture which consists of three stage; preamplifier, positive feedback decision circuit and output buffer. This architecture provides both good gain and offset characteristics by combining the pre-amplifier and the positive feedback decision circuit. The MOSFETs’ W/L factor of the comparator circuit also contributes to the characteristics improvement. Increment of the pre-amplifier’s input MOSFETs widths increases the gain of the comparator while the width of MOSFETs in decision circuit will determine the offset of the comparator. 2010 Thesis https://ir.uitm.edu.my/id/eprint/98857/ https://ir.uitm.edu.my/id/eprint/98857/1/98857.pdf text en public degree Universiti Teknologi MARA (UiTM) Faculty of Electrical Engineering Mohamad Saad, Puteri Sarah
institution	Universiti Teknologi MARA
collection	UiTM Institutional Repository
language	English
advisor	Mohamad Saad, Puteri Sarah
topic	Applications of electronics
spellingShingle	Applications of electronics Tuan Zakaria, Tengku Zairi Ezwa Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria
description	This thesis present the design of a high performance on-chip comparator of 8-bit Analogue-To-Digital Converter (ADC) has been designed in a 0.35µm Complementary Metal Oxide Semiconductor (CMOS) Technology process. Full custom design flow is implemented in which the design starts with schematic entry followed by simulation for characterization purpose and validation. The IC layout of the comparator is achieved along with the post layout simulation and layout verification. The designed comparator is tested in an 8-bit ADC by simulation to determine the functionality and performance. The comparator can handle positive and negative input signals. A polarity signal changes the polarity of the threshold level and makes the output signal always active high. The design is based on basic comparator architecture which consists of three stage; preamplifier, positive feedback decision circuit and output buffer. This architecture provides both good gain and offset characteristics by combining the pre-amplifier and the positive feedback decision circuit. The MOSFETs’ W/L factor of the comparator circuit also contributes to the characteristics improvement. Increment of the pre-amplifier’s input MOSFETs widths increases the gain of the comparator while the width of MOSFETs in decision circuit will determine the offset of the comparator.
format	Thesis
qualification_level	Bachelor degree
author	Tuan Zakaria, Tengku Zairi Ezwa
author_facet	Tuan Zakaria, Tengku Zairi Ezwa
author_sort	Tuan Zakaria, Tengku Zairi Ezwa
title	Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria
title_short	Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria
title_full	Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria
title_fullStr	Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria
title_full_unstemmed	Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria
title_sort	design a comparator of 8 bit analogue to digital converter (adc) in a 0.35 micro meter cmos technology by using mentor graphics / tengku zairi ezwa tuan zakaria
granting_institution	Universiti Teknologi MARA (UiTM)
granting_department	Faculty of Electrical Engineering
publishDate	2010
url	https://ir.uitm.edu.my/id/eprint/98857/1/98857.pdf
_version_	1811768966310264832

Design a comparator of 8 bit analogue to digital converter (ADC) in a 0.35 micro meter CMOS technology by using mentor graphics / Tengku Zairi Ezwa Tuan Zakaria

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