Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos)

Miniaturization of semiconductor devices beyond sub-l00nm has commenced several problems for further scaling. Low subthreshold voltage, reduced carrier mobility, and increased leakage currents were identified to be the paramount issues that leads to high power consumption and heating. The Impact Ion...

Full description

Saved in:

Bibliographic Details
Main Author:	Divya Yadav Pogaku
Format:	Thesis
Language:	English
Published:	2011
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	https://eprints.ums.edu.my/id/eprint/11814/1/mt0000000641.pdf
Tags:	Add Tag No Tags, Be the first to tag this record!

id	my-ums-ep.11814
record_format	uketd_dc
spelling	my-ums-ep.118142017-11-07T07:13:01Z Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos) 2011 Divya Yadav Pogaku TK Electrical engineering. Electronics Nuclear engineering Miniaturization of semiconductor devices beyond sub-l00nm has commenced several problems for further scaling. Low subthreshold voltage, reduced carrier mobility, and increased leakage currents were identified to be the paramount issues that leads to high power consumption and heating. The Impact Ionization MOSFET (IMOS) device has evolved to attract increasing attention for its ability to overcome these problems. The IMOS device works on the principle of avalanche breakdown mechanism that gives very good subthreshold slopes of 20mV /decade, but at high supply voltage. Hence, to bring down the supply voltage as well as to obtain low threshold voltage and subthreshold voltage, the Vertical Strained Silicon Germanium (SiGe) Impact Ionization MOSFET (VESIMOS) has been successfully developed In this study. VESIMOS device integrates vertical structure concept of IMOS and strained SiGe technology. The VESIMOS has been designed and simulated using Silva co Technology Computer Aided Design (TCAD) tools for both device process (ATHENA) and characterization (ATlAS) respectively. The transfer characteristics of VESIMOS showed an inverse proportionality of supply voltage and subthreshold voltage due to lower breakdown strength of Ge content. However, the subthreshold voltage is in direct proportion to the leakage current. The subthreshold voltage, S=10mV/dec was obtained at threshold voltage, VTH=0.9V, with supply voltage, Vos=1.75V. This VTH was found to be 40% lower than the Sivertical IMOS device's VTHâ€¢ The output characteristics of VESIMOS found that the device goes into saturation for supply voltage more than 2.5V, attributed to the presence of Germanium (Ge) that has high and symmetric Impact Ionization rates. In addition, VESIMOS electron mobility was found to be improved by 40% compared to Si-vertical IMOS, due to the presence of the compressive strain. Consequently, it is also revealed that an Increase in strain will also increase mobility and reduce further the threshold voltage. However, the increase in strain layer thickness (T siGe), resulted in an increase of threshold voltage and lowered the mobility. This is due to the strain relaxation in the SiGe layer. In addition, it is also found that at high source-drain doping concentration (S/D=2xl018/cm3), the threshold voltage dropped to O.88V, with supply voltage of 1.7SV. This Is due to high electric field effect in the channel at high doping concentration, which is contrary to the doping effects of conventional MOSFET. 2011 Thesis https://eprints.ums.edu.my/id/eprint/11814/ https://eprints.ums.edu.my/id/eprint/11814/1/mt0000000641.pdf text en public masters Universiti Malaysia Sabah school of engineering and information technology
institution	Universiti Malaysia Sabah
collection	UMS Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Divya Yadav Pogaku Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos)
description	Miniaturization of semiconductor devices beyond sub-l00nm has commenced several problems for further scaling. Low subthreshold voltage, reduced carrier mobility, and increased leakage currents were identified to be the paramount issues that leads to high power consumption and heating. The Impact Ionization MOSFET (IMOS) device has evolved to attract increasing attention for its ability to overcome these problems. The IMOS device works on the principle of avalanche breakdown mechanism that gives very good subthreshold slopes of 20mV /decade, but at high supply voltage. Hence, to bring down the supply voltage as well as to obtain low threshold voltage and subthreshold voltage, the Vertical Strained Silicon Germanium (SiGe) Impact Ionization MOSFET (VESIMOS) has been successfully developed In this study. VESIMOS device integrates vertical structure concept of IMOS and strained SiGe technology. The VESIMOS has been designed and simulated using Silva co Technology Computer Aided Design (TCAD) tools for both device process (ATHENA) and characterization (ATlAS) respectively. The transfer characteristics of VESIMOS showed an inverse proportionality of supply voltage and subthreshold voltage due to lower breakdown strength of Ge content. However, the subthreshold voltage is in direct proportion to the leakage current. The subthreshold voltage, S=10mV/dec was obtained at threshold voltage, VTH=0.9V, with supply voltage, Vos=1.75V. This VTH was found to be 40% lower than the Sivertical IMOS device's VTHâ€¢ The output characteristics of VESIMOS found that the device goes into saturation for supply voltage more than 2.5V, attributed to the presence of Germanium (Ge) that has high and symmetric Impact Ionization rates. In addition, VESIMOS electron mobility was found to be improved by 40% compared to Si-vertical IMOS, due to the presence of the compressive strain. Consequently, it is also revealed that an Increase in strain will also increase mobility and reduce further the threshold voltage. However, the increase in strain layer thickness (T siGe), resulted in an increase of threshold voltage and lowered the mobility. This is due to the strain relaxation in the SiGe layer. In addition, it is also found that at high source-drain doping concentration (S/D=2xl018/cm3), the threshold voltage dropped to O.88V, with supply voltage of 1.7SV. This Is due to high electric field effect in the channel at high doping concentration, which is contrary to the doping effects of conventional MOSFET.
format	Thesis
qualification_level	Master's degree
author	Divya Yadav Pogaku
author_facet	Divya Yadav Pogaku
author_sort	Divya Yadav Pogaku
title	Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos)
title_short	Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos)
title_full	Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos)
title_fullStr	Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos)
title_full_unstemmed	Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos)
title_sort	design and simulation of vertical strained sige impact ionization mosfet(vesimos)
granting_institution	Universiti Malaysia Sabah
granting_department	school of engineering and information technology
publishDate	2011
url	https://eprints.ums.edu.my/id/eprint/11814/1/mt0000000641.pdf
_version_	1747836428982681600

Design and simulation of vertical strained SiGe impact ionization mosfet(vesimos)

Similar Items