Design and implementation of laser missile frequency jamming system using Spatial Parallelism on FPGA for better performance and throughput
When a processing multiple data input at a time, exploring the parallelism mechanism is required. The spatial parallelism can provide the ability for duplicating the task for a specific module. The current Frequency Jamming systems have the ability to detect one frequency signal at a time and conf...
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my-unimap-621282019-09-27T03:12:08Z Design and implementation of laser missile frequency jamming system using Spatial Parallelism on FPGA for better performance and throughput Omar Faez, Yousif Dr. Muataz Hameed Salih Al Doori When a processing multiple data input at a time, exploring the parallelism mechanism is required. The spatial parallelism can provide the ability for duplicating the task for a specific module. The current Frequency Jamming systems have the ability to detect one frequency signal at a time and confront critical issue like delay in processing the signals. This delay is considered as a natural reason for the system modules architecture or in which way these signals were processed or even the computational ability of these modules. Detecting the emitted frequencies of four proposed laser missiles launchers is done in this research. Applying the spatial parallelism mechanism over the FPGA enriches the proposed system with multiple critical features. These gained features are considered as a key factor in any system failure or success like decreasing the system cost, speed up the system performance as well as increasing the system alongside with decreasing the power consumption. The entire Laser Missile Frequency Jamming system is designed and implemented on Field Programmable Gate Array (FPGA) chip. The proposed system is synthesized and evaluated based on the Nios II Embedded Evaluation Kit (NEEK). The performance of the proposed system shows scalable speedup and enhanced system performance. The implementation has achieved acceptable throughput and lower complexity (small size (2604)) logic elements in terms of FPGA resource usage and high operating frequency (200 MHz)). In addition, the structural design methodology also allows scalability of the ECCA as the entire system grows. Universiti Malaysia Perlis (UniMAP) 2015 Thesis en http://dspace.unimap.edu.my:80/xmlui/handle/123456789/62128 http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/62128/1/Page%201-24.pdf 5b35e15bfe6a683d98a8de3924405494 http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/62128/2/Full%20text.pdf b92ffbb26036019dbabb453f5c10235e http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/62128/3/license.txt 8a4605be74aa9ea9d79846c1fba20a33 System design Parallelism mechanism Laser missile frequency jamming system Parallelism computing Parallelism School of Computer and Communication Engineering |
institution |
Universiti Malaysia Perlis |
collection |
UniMAP Institutional Repository |
language |
English |
advisor |
Dr. Muataz Hameed Salih Al Doori |
topic |
System design Parallelism mechanism Laser missile frequency jamming system Parallelism computing Parallelism |
spellingShingle |
System design Parallelism mechanism Laser missile frequency jamming system Parallelism computing Parallelism Omar Faez, Yousif Design and implementation of laser missile frequency jamming system using Spatial Parallelism on FPGA for better performance and throughput |
description |
When a processing multiple data input at a time, exploring the parallelism mechanism is required. The spatial parallelism can provide the ability for duplicating the task for a
specific module. The current Frequency Jamming systems have the ability to detect one
frequency signal at a time and confront critical issue like delay in processing the signals.
This delay is considered as a natural reason for the system modules architecture or in
which way these signals were processed or even the computational ability of these
modules. Detecting the emitted frequencies of four proposed laser missiles launchers is
done in this research. Applying the spatial parallelism mechanism over the FPGA
enriches the proposed system with multiple critical features. These gained features are
considered as a key factor in any system failure or success like decreasing the system
cost, speed up the system performance as well as increasing the system alongside with
decreasing the power consumption. The entire Laser Missile Frequency Jamming system
is designed and implemented on Field Programmable Gate Array (FPGA) chip. The
proposed system is synthesized and evaluated based on the Nios II Embedded Evaluation
Kit (NEEK). The performance of the proposed system shows scalable speedup and
enhanced system performance. The implementation has achieved acceptable throughput
and lower complexity (small size (2604)) logic elements in terms of FPGA resource
usage and high operating frequency (200 MHz)). In addition, the structural design
methodology also allows scalability of the ECCA as the entire system grows. |
format |
Thesis |
author |
Omar Faez, Yousif |
author_facet |
Omar Faez, Yousif |
author_sort |
Omar Faez, Yousif |
title |
Design and implementation of laser missile frequency jamming system using Spatial Parallelism on FPGA for better performance and throughput |
title_short |
Design and implementation of laser missile frequency jamming system using Spatial Parallelism on FPGA for better performance and throughput |
title_full |
Design and implementation of laser missile frequency jamming system using Spatial Parallelism on FPGA for better performance and throughput |
title_fullStr |
Design and implementation of laser missile frequency jamming system using Spatial Parallelism on FPGA for better performance and throughput |
title_full_unstemmed |
Design and implementation of laser missile frequency jamming system using Spatial Parallelism on FPGA for better performance and throughput |
title_sort |
design and implementation of laser missile frequency jamming system using spatial parallelism on fpga for better performance and throughput |
granting_institution |
Universiti Malaysia Perlis (UniMAP) |
granting_department |
School of Computer and Communication Engineering |
url |
http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/62128/1/Page%201-24.pdf http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/62128/2/Full%20text.pdf |
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