Thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor
In development of the die stacking interconnection technology, the thermal analysis on stacked dies are commonly engaged in semiconductor products. However, thermal issues are not the main criteria for stack die configuration and thus the combined effects of thermal and mechanical stresses are ov...
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my-unimap-774292022-12-07T02:03:55Z Thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor Vithyacharan, Retnasamy, Dr. In development of the die stacking interconnection technology, the thermal analysis on stacked dies are commonly engaged in semiconductor products. However, thermal issues are not the main criteria for stack die configuration and thus the combined effects of thermal and mechanical stresses are overlooked during the design of the stacked dies. As there are existence of multiple dies and other materials with different Coefficient of Thermal Expansion (CTE), thermo-mechanical loading and its effect on reliability needs to be studied for optimum the interconnection design and die configuration. The focus in this thesis is a) thermal-mechanical analysis on the wirebond interconnection of stacked die by using element analysis, b) the study of planar bonding of stacked die to improve of interconnection. The investigation is carried by modelling an Insulated-Gate Bipolar Transistor (IGBT) with wirebonds based on an investigation carried out Dudek et al. 2015. This model serves as a basis for comparison. The model undergoes cyclic heating and cooling with a temperature delta of 150K and the stress experienced by the model at the bonding interface between Wirebond and Baseplate is recorded at the of each heating and cooling cycles. The test is repeated using a model IGBT with the wirebond replaced with a planar bond, and the stress results are compared. The results of the thermal modelling matches the model by Dudek et al, showing the viability of the model. Thermomechanical analysis shows stress in the interconnection between wirebond and baseplate is highest at the edges of the interconnection and is the same for the planar bond. The results of the analysis show that the stresses in a stacked die are highest at low temperature. The planar bonding method offers a marked improvement over the wirebond in terms of interconnection stress and thus is a viable for improving the thermo-mechanical stresses in a stacked die. Universiti Malaysia Perlis (UniMAP) Thesis en http://dspace.unimap.edu.my:80/xmlui/handle/123456789/77429 http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77429/4/license.txt 8a4605be74aa9ea9d79846c1fba20a33 http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77429/1/Page%201-24.pdf fc3b68ecd931f57884d2533f295a838d http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77429/2/Full%20text.pdf dc5c404b8d66e9d61054670c88ab69c3 http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77429/3/Declaration%20Form.pdf 4323f9911872d7ea7db5e1d73f72749c Universiti Malaysia Perlis (UniMAP) Insulated gate bipolar transistors Bipolar transistors Wire bonding (Electronic packaging) Planar transistors School of Microelectronic Engineering |
| institution |
Universiti Malaysia Perlis |
| collection |
UniMAP Institutional Repository |
| language |
English |
| advisor |
Vithyacharan, Retnasamy, Dr. |
| topic |
Insulated gate bipolar transistors Bipolar transistors Wire bonding (Electronic packaging) Planar transistors |
| spellingShingle |
Insulated gate bipolar transistors Bipolar transistors Wire bonding (Electronic packaging) Planar transistors Thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor |
| description |
In development of the die stacking interconnection technology, the thermal analysis on
stacked dies are commonly engaged in semiconductor products. However, thermal issues
are not the main criteria for stack die configuration and thus the combined effects of
thermal and mechanical stresses are overlooked during the design of the stacked dies. As
there are existence of multiple dies and other materials with different Coefficient of
Thermal Expansion (CTE), thermo-mechanical loading and its effect on reliability needs
to be studied for optimum the interconnection design and die configuration. The focus in
this thesis is a) thermal-mechanical analysis on the wirebond interconnection of stacked
die by using element analysis, b) the study of planar bonding of stacked die to improve
of interconnection. The investigation is carried by modelling an Insulated-Gate Bipolar
Transistor (IGBT) with wirebonds based on an investigation carried out Dudek et al. 2015.
This model serves as a basis for comparison. The model undergoes cyclic heating and
cooling with a temperature delta of 150K and the stress experienced by the model at the
bonding interface between Wirebond and Baseplate is recorded at the of each heating and
cooling cycles. The test is repeated using a model IGBT with the wirebond replaced with
a planar bond, and the stress results are compared. The results of the thermal modelling
matches the model by Dudek et al, showing the viability of the model. Thermomechanical
analysis shows stress in the interconnection between wirebond and baseplate
is highest at the edges of the interconnection and is the same for the planar bond. The
results of the analysis show that the stresses in a stacked die are highest at low temperature.
The planar bonding method offers a marked improvement over the wirebond in terms of
interconnection stress and thus is a viable for improving the thermo-mechanical stresses
in a stacked die. |
| format |
Thesis |
| title |
Thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor |
| title_short |
Thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor |
| title_full |
Thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor |
| title_fullStr |
Thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor |
| title_full_unstemmed |
Thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor |
| title_sort |
thermal-mechanical analysis of bonding pad in insulated gate bipolar transistor |
| granting_institution |
Universiti Malaysia Perlis (UniMAP) |
| granting_department |
School of Microelectronic Engineering |
| url |
http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77429/1/Page%201-24.pdf http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77429/2/Full%20text.pdf http://dspace.unimap.edu.my:80/xmlui/bitstream/123456789/77429/3/Declaration%20Form.pdf |
| _version_ |
1776104277507309568 |