Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System
Ultra wideband (UWB) becomes one of the famous and important technologies nowadays with the coverage of 3.1 GHz to 10.6 GHz of frequency. The power amplifier is located at the end of the transmitter in the transceiver, the most important devices in UWB. Due to the existence of other communication sy...
محفوظ في:
| المؤلف الرئيسي: | |
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| التنسيق: | أطروحة |
| اللغة: | English |
| منشور في: |
2019
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| الموضوعات: | |
| الوصول للمادة أونلاين: | http://ir.unimas.my/id/eprint/27538/1/Dayang%20Siti%20Amira%20Binti%20Awg%20Yusuf%20ft.pdf |
| الوسوم: |
إضافة وسم
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| الملخص: | Ultra wideband (UWB) becomes one of the famous and important technologies nowadays with the coverage of 3.1 GHz to 10.6 GHz of frequency. The power amplifier is located at the end of the transmitter in the transceiver, the most important devices in UWB. Due to the existence of other communication systems at the frequency of 5 GHz-6 GHz, this unwanted signals should be eliminated to reduce interference and to get the best performance of power amplifier. In this research, two proposed UWB Power Amplifier will be designed using 0.18 µm Complementary Metal-Oxide Semiconductor (CMOS) technology to reduce the cost and to produce single-chip of the transceiver. Besides that, the notch filter also will be applied in these PA to eliminate the 5 GHz-6 GHz of frequencies. Both designs will cover full band which is from 3.1 GHz to 10.6 GHz but will eliminate the frequency of 5 GHz-6 GHz. The Silterra CADENCE EDA software is used to design and analyze all the design. In order to get the value of each component, the parametric analysis is done to get the maximum performance of a power amplifier with a notch filter. The first proposed design is using resistive feedback topology while the second proposed design is using current reuse. The first proposed PA design obtained a maximum gain of 19.25 dB, an input return loss, S11 less than -1.68 dB, an output return loss, S22 less than -8.13 dB and power consumption of 67.32 mA. The second proposed design achieved maximum gain of 24.86 dB, an input return loss, S11 less than -2.02 dB, and output return loss, S22 less than -10 dB with power consumption of 85.5 mW. This simulation result shows with the implementation of notch filter, it is still possible to maintain the performance of other PA parameters even though there is rejection at certain range of frequency. |
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