Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System

Ultra wideband (UWB) becomes one of the famous and important technologies nowadays with the coverage of 3.1 GHz to 10.6 GHz of frequency. The power amplifier is located at the end of the transmitter in the transceiver, the most important devices in UWB. Due to the existence of other communication sy...

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Main Author: Dayang Siti Amira, Binti Awg Yusuf
Format: Thesis
Language:English
Published: 2019
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Online Access:http://ir.unimas.my/id/eprint/27538/1/Dayang%20Siti%20Amira%20Binti%20Awg%20Yusuf%20ft.pdf
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spelling my-unimas-ir.275382023-05-11T02:30:40Z Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System 2019-10 Dayang Siti Amira, Binti Awg Yusuf TK Electrical engineering. Electronics Nuclear engineering Ultra wideband (UWB) becomes one of the famous and important technologies nowadays with the coverage of 3.1 GHz to 10.6 GHz of frequency. The power amplifier is located at the end of the transmitter in the transceiver, the most important devices in UWB. Due to the existence of other communication systems at the frequency of 5 GHz-6 GHz, this unwanted signals should be eliminated to reduce interference and to get the best performance of power amplifier. In this research, two proposed UWB Power Amplifier will be designed using 0.18 µm Complementary Metal-Oxide Semiconductor (CMOS) technology to reduce the cost and to produce single-chip of the transceiver. Besides that, the notch filter also will be applied in these PA to eliminate the 5 GHz-6 GHz of frequencies. Both designs will cover full band which is from 3.1 GHz to 10.6 GHz but will eliminate the frequency of 5 GHz-6 GHz. The Silterra CADENCE EDA software is used to design and analyze all the design. In order to get the value of each component, the parametric analysis is done to get the maximum performance of a power amplifier with a notch filter. The first proposed design is using resistive feedback topology while the second proposed design is using current reuse. The first proposed PA design obtained a maximum gain of 19.25 dB, an input return loss, S11 less than -1.68 dB, an output return loss, S22 less than -8.13 dB and power consumption of 67.32 mA. The second proposed design achieved maximum gain of 24.86 dB, an input return loss, S11 less than -2.02 dB, and output return loss, S22 less than -10 dB with power consumption of 85.5 mW. This simulation result shows with the implementation of notch filter, it is still possible to maintain the performance of other PA parameters even though there is rejection at certain range of frequency. Universiti Malaysia Sarawak (UNIMAS) 2019-10 Thesis http://ir.unimas.my/id/eprint/27538/ http://ir.unimas.my/id/eprint/27538/1/Dayang%20Siti%20Amira%20Binti%20Awg%20Yusuf%20ft.pdf text en validuser masters Universiti Malaysia Sarawak (UNIMAS) Faculty of Engineering
institution Universiti Malaysia Sarawak
collection UNIMAS Institutional Repository
language English
topic TK Electrical engineering
Electronics Nuclear engineering
spellingShingle TK Electrical engineering
Electronics Nuclear engineering
Dayang Siti Amira, Binti Awg Yusuf
Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System
description Ultra wideband (UWB) becomes one of the famous and important technologies nowadays with the coverage of 3.1 GHz to 10.6 GHz of frequency. The power amplifier is located at the end of the transmitter in the transceiver, the most important devices in UWB. Due to the existence of other communication systems at the frequency of 5 GHz-6 GHz, this unwanted signals should be eliminated to reduce interference and to get the best performance of power amplifier. In this research, two proposed UWB Power Amplifier will be designed using 0.18 µm Complementary Metal-Oxide Semiconductor (CMOS) technology to reduce the cost and to produce single-chip of the transceiver. Besides that, the notch filter also will be applied in these PA to eliminate the 5 GHz-6 GHz of frequencies. Both designs will cover full band which is from 3.1 GHz to 10.6 GHz but will eliminate the frequency of 5 GHz-6 GHz. The Silterra CADENCE EDA software is used to design and analyze all the design. In order to get the value of each component, the parametric analysis is done to get the maximum performance of a power amplifier with a notch filter. The first proposed design is using resistive feedback topology while the second proposed design is using current reuse. The first proposed PA design obtained a maximum gain of 19.25 dB, an input return loss, S11 less than -1.68 dB, an output return loss, S22 less than -8.13 dB and power consumption of 67.32 mA. The second proposed design achieved maximum gain of 24.86 dB, an input return loss, S11 less than -2.02 dB, and output return loss, S22 less than -10 dB with power consumption of 85.5 mW. This simulation result shows with the implementation of notch filter, it is still possible to maintain the performance of other PA parameters even though there is rejection at certain range of frequency.
format Thesis
qualification_level Master's degree
author Dayang Siti Amira, Binti Awg Yusuf
author_facet Dayang Siti Amira, Binti Awg Yusuf
author_sort Dayang Siti Amira, Binti Awg Yusuf
title Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System
title_short Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System
title_full Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System
title_fullStr Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System
title_full_unstemmed Design of CMOS Power Amplifier with Notch Filter for Ultra Wideband System
title_sort design of cmos power amplifier with notch filter for ultra wideband system
granting_institution Universiti Malaysia Sarawak (UNIMAS)
granting_department Faculty of Engineering
publishDate 2019
url http://ir.unimas.my/id/eprint/27538/1/Dayang%20Siti%20Amira%20Binti%20Awg%20Yusuf%20ft.pdf
_version_ 1783728346423623680