Modelling and Simulation of Si/SiGe Heterostructure Devices

Complementary metal-oxide-semiconductor (CMOS) is currently the most dominant technology used in making integrated systems. It consists of both n-channel MOS transistor (NMOS) and p-channel MOS transistor (PMOS) fabricated on the same substrate. Conventionally, the substrate is made of silicon. A...

Full description

Saved in:

Bibliographic Details
Main Author:	Abd. Rasheid, Norulhuda
Format:	Thesis
Language:	English English
Published:	2002
Subjects:	Heterostructures Metal oxide semiconductors
Online Access:	http://psasir.upm.edu.my/id/eprint/10622/1/FK_2002_16.pdf
Tags:	Add Tag No Tags, Be the first to tag this record!

id	my-upm-ir.10622
record_format	uketd_dc
spelling	my-upm-ir.106222024-04-30T01:00:40Z Modelling and Simulation of Si/SiGe Heterostructure Devices 2002-04 Abd. Rasheid, Norulhuda Complementary metal-oxide-semiconductor (CMOS) is currently the most dominant technology used in making integrated systems. It consists of both n-channel MOS transistor (NMOS) and p-channel MOS transistor (PMOS) fabricated on the same substrate. Conventionally, the substrate is made of silicon. Alternatively, the substrate can be made from different layer of semiconductors known as heterostructure. Much attention has been given to SilSiGe due to its compatibility with silicon and the higher carrier mobilities. SiGe is an alloy which is said to be an alternative solution to the problem of a down-scaled CMOS to produce high speed device. This work consists of modelling three different of SilSiGe heterostructure substrates which are used to construct n- and p-channel MOSFETs and later to construct CMOS inverter. The three types of heterostructures are a strained SiGe on silicon substrate, a strained silicon on relaxed SiGe/Si substrate and a strained SiGe on strained Silrelaxed layers of SiGe/Si substrate. A device simulator, Avanti MEDICI Version 1999.2 is used in this project. Although it has heterojunction capability, it does not support model for a strained Si. This work also highlights the method to simulate SilSiGe heterostructures containing strained layer using MEDICI. Simulations on the band structure and current-voltage (I-V) characteristics of the MOSFETs are carried out. The I-V g and I-V d are simulated for different value of Ge% and mobility. This is to observe the effect of varying the value of Ge% and mobility used in the design. The simulation on the CMOS inverter as the fundamental circuit is carried out to obtain the transfer curve. The noise margin and switching characteristics can be extracted from the transfer curve. All the simulated results are then compared with the Si bulk. The analyses show that the performance of the SilSiGe heterostructures is better in terms of the electrical characteristics of the MOSFETs and the switching characteristics of the CMOS inverter, as compared to the performance of the Si bulk. Heterostructures Metal oxide semiconductors 2002-04 Thesis http://psasir.upm.edu.my/id/eprint/10622/ http://psasir.upm.edu.my/id/eprint/10622/1/FK_2002_16.pdf text en public masters Universiti Putra Malaysia Heterostructures Metal oxide semiconductors Faculty of Engineering Mohd Sidek, Roslina English
institution	Universiti Putra Malaysia
collection	PSAS Institutional Repository
language	English English
advisor	Mohd Sidek, Roslina
topic	Heterostructures Metal oxide semiconductors
spellingShingle	Heterostructures Metal oxide semiconductors Abd. Rasheid, Norulhuda Modelling and Simulation of Si/SiGe Heterostructure Devices
description	Complementary metal-oxide-semiconductor (CMOS) is currently the most dominant technology used in making integrated systems. It consists of both n-channel MOS transistor (NMOS) and p-channel MOS transistor (PMOS) fabricated on the same substrate. Conventionally, the substrate is made of silicon. Alternatively, the substrate can be made from different layer of semiconductors known as heterostructure. Much attention has been given to SilSiGe due to its compatibility with silicon and the higher carrier mobilities. SiGe is an alloy which is said to be an alternative solution to the problem of a down-scaled CMOS to produce high speed device. This work consists of modelling three different of SilSiGe heterostructure substrates which are used to construct n- and p-channel MOSFETs and later to construct CMOS inverter. The three types of heterostructures are a strained SiGe on silicon substrate, a strained silicon on relaxed SiGe/Si substrate and a strained SiGe on strained Silrelaxed layers of SiGe/Si substrate. A device simulator, Avanti MEDICI Version 1999.2 is used in this project. Although it has heterojunction capability, it does not support model for a strained Si. This work also highlights the method to simulate SilSiGe heterostructures containing strained layer using MEDICI. Simulations on the band structure and current-voltage (I-V) characteristics of the MOSFETs are carried out. The I-V g and I-V d are simulated for different value of Ge% and mobility. This is to observe the effect of varying the value of Ge% and mobility used in the design. The simulation on the CMOS inverter as the fundamental circuit is carried out to obtain the transfer curve. The noise margin and switching characteristics can be extracted from the transfer curve. All the simulated results are then compared with the Si bulk. The analyses show that the performance of the SilSiGe heterostructures is better in terms of the electrical characteristics of the MOSFETs and the switching characteristics of the CMOS inverter, as compared to the performance of the Si bulk.
format	Thesis
qualification_level	Master's degree
author	Abd. Rasheid, Norulhuda
author_facet	Abd. Rasheid, Norulhuda
author_sort	Abd. Rasheid, Norulhuda
title	Modelling and Simulation of Si/SiGe Heterostructure Devices
title_short	Modelling and Simulation of Si/SiGe Heterostructure Devices
title_full	Modelling and Simulation of Si/SiGe Heterostructure Devices
title_fullStr	Modelling and Simulation of Si/SiGe Heterostructure Devices
title_full_unstemmed	Modelling and Simulation of Si/SiGe Heterostructure Devices
title_sort	modelling and simulation of si/sige heterostructure devices
granting_institution	Universiti Putra Malaysia
granting_department	Faculty of Engineering
publishDate	2002
url	http://psasir.upm.edu.my/id/eprint/10622/1/FK_2002_16.pdf
_version_	1804888579125542912

Modelling and Simulation of Si/SiGe Heterostructure Devices

Similar Items