On-chip communication system modeling approach for reability analysis focusing on functional failures
The advances in the process technology have shrunk the feature size which has paved the road to higher orders of integration in the recent years. Year by year, the number of components integrated into a single chip is growing. Resulted in larger number of interconnects, the communication between the...
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| 主要作者: | |
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| 格式: | Thesis |
| 語言: | English |
| 出版: |
2012
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| 主題: | |
| 在線閱讀: | http://psasir.upm.edu.my/id/eprint/59772/1/FK%202012%2095IR.pdf |
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