Real time plate recognition for motorcycle using field programmable gate array

The aim of this project is to develop motorcycle plate image detection and recognition framework for traffic offender using Field Programmable Gate Array (FPGA). The proposed system has processing time of 33.3 milliseconds in various critical conditions, such as daylight, rainy daylight and night...

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Main Author:	Mat Nong, Mohd Ali
Format:	Thesis
Language:	English
Published:	2019
Subjects:	Gate array circuits Programmable array logic
Online Access:	http://psasir.upm.edu.my/id/eprint/99237/1/ITMA%202020%2013%20IR.pdf
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id	my-upm-ir.99237
record_format	uketd_dc
spelling	my-upm-ir.992372023-04-03T06:25:10Z Real time plate recognition for motorcycle using field programmable gate array 2019-12 Mat Nong, Mohd Ali The aim of this project is to develop motorcycle plate image detection and recognition framework for traffic offender using Field Programmable Gate Array (FPGA). The proposed system has processing time of 33.3 milliseconds in various critical conditions, such as daylight, rainy daylight and night. Currently, the available technology is lacking due to the system implementation is not robust and less efficient. Benchmarking study for fast processing system showed FPGA can carry out real-time processing at 128 × 128 resolution video sequences at 30 frames per second (fps). Therefore FPGA was selected to improve the plate number recognition for motorcycle. Comparison between hardware (FPGA) and software (MATLAB) implementation of edge detection was also performed. Currently, the time for processing motorcycle plate image using software is 52 milliseconds. To meet the processing time constraints for the developed framework, it is important to quantify the reduction of processing time that can be achieved if the framework component are embedded into hardware-based platform such as FPGA. MATLAB-Simulink was selected for designing the detection system. This system was designed to detect static images and moving objects in critical condition from 5 to 15 meters distances. Then, the detection system was implemented on the FPGA for the detection and recognition process. The output image was analyzed by comparing the accuracy of bounding box and edges displayed in different conditions, threshold levels, resolutions and distances. From this proposed system, the daylight condition at 5 meter distance gives the highest accuracy of 99% at threshold level ranging from 2 – 10. In addition, the highest resolutions accuracy is 99% at 1024 ×768 pixels. This comparable with the output from Matlab Simulink system that shows the best accuracy of 99% at threshold level 2 and resolution pixel 1024 ×768 pixels. The second best conditions is rainy daylight, in which the threshold accuracy is 99% at level 10 with 99% resolution accuracy at 1024 ×768 pixels. From the analysis, it can be concluded that daylight is the best condition in detecting the motorcycle images, followed by rainy daylight and night conditions. The speed to process the image is 30 frames per second, which is 58 % faster than images processed by Matlab Simulink. Thus, this proposed system on FPGA is more flexible, efficient and robust for real time plate recognition for motorcycle. This study can be implemented to efficiently identify road traffic offenders and improve visual driver support system in the future. Gate array circuits Programmable array logic 2019-12 Thesis http://psasir.upm.edu.my/id/eprint/99237/ http://psasir.upm.edu.my/id/eprint/99237/1/ITMA%202020%2013%20IR.pdf text en public masters Universiti Putra Malaysia Gate array circuits Programmable array logic Mohd Sidek, Roslina
institution	Universiti Putra Malaysia
collection	PSAS Institutional Repository
language	English
advisor	Mohd Sidek, Roslina
topic	Gate array circuits Programmable array logic
spellingShingle	Gate array circuits Programmable array logic Mat Nong, Mohd Ali Real time plate recognition for motorcycle using field programmable gate array
description	The aim of this project is to develop motorcycle plate image detection and recognition framework for traffic offender using Field Programmable Gate Array (FPGA). The proposed system has processing time of 33.3 milliseconds in various critical conditions, such as daylight, rainy daylight and night. Currently, the available technology is lacking due to the system implementation is not robust and less efficient. Benchmarking study for fast processing system showed FPGA can carry out real-time processing at 128 × 128 resolution video sequences at 30 frames per second (fps). Therefore FPGA was selected to improve the plate number recognition for motorcycle. Comparison between hardware (FPGA) and software (MATLAB) implementation of edge detection was also performed. Currently, the time for processing motorcycle plate image using software is 52 milliseconds. To meet the processing time constraints for the developed framework, it is important to quantify the reduction of processing time that can be achieved if the framework component are embedded into hardware-based platform such as FPGA. MATLAB-Simulink was selected for designing the detection system. This system was designed to detect static images and moving objects in critical condition from 5 to 15 meters distances. Then, the detection system was implemented on the FPGA for the detection and recognition process. The output image was analyzed by comparing the accuracy of bounding box and edges displayed in different conditions, threshold levels, resolutions and distances. From this proposed system, the daylight condition at 5 meter distance gives the highest accuracy of 99% at threshold level ranging from 2 – 10. In addition, the highest resolutions accuracy is 99% at 1024 ×768 pixels. This comparable with the output from Matlab Simulink system that shows the best accuracy of 99% at threshold level 2 and resolution pixel 1024 ×768 pixels. The second best conditions is rainy daylight, in which the threshold accuracy is 99% at level 10 with 99% resolution accuracy at 1024 ×768 pixels. From the analysis, it can be concluded that daylight is the best condition in detecting the motorcycle images, followed by rainy daylight and night conditions. The speed to process the image is 30 frames per second, which is 58 % faster than images processed by Matlab Simulink. Thus, this proposed system on FPGA is more flexible, efficient and robust for real time plate recognition for motorcycle. This study can be implemented to efficiently identify road traffic offenders and improve visual driver support system in the future.
format	Thesis
qualification_level	Master's degree
author	Mat Nong, Mohd Ali
author_facet	Mat Nong, Mohd Ali
author_sort	Mat Nong, Mohd Ali
title	Real time plate recognition for motorcycle using field programmable gate array
title_short	Real time plate recognition for motorcycle using field programmable gate array
title_full	Real time plate recognition for motorcycle using field programmable gate array
title_fullStr	Real time plate recognition for motorcycle using field programmable gate array
title_full_unstemmed	Real time plate recognition for motorcycle using field programmable gate array
title_sort	real time plate recognition for motorcycle using field programmable gate array
granting_institution	Universiti Putra Malaysia
publishDate	2019
url	http://psasir.upm.edu.my/id/eprint/99237/1/ITMA%202020%2013%20IR.pdf
_version_	1776100312305631232

Real time plate recognition for motorcycle using field programmable gate array

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