APA (7th ed.) Citation

Kin , S. K. (2013). Timing performance enhance for routing channel in 28NM FPGA chip.

Chicago Style (17th ed.) Citation

Kin , Si Kee. Timing Performance Enhance for Routing Channel in 28NM FPGA Chip. 2013.

MLA (8th ed.) Citation

Kin , Si Kee. Timing Performance Enhance for Routing Channel in 28NM FPGA Chip. 2013.

Warning: These citations may not always be 100% accurate.