APA引文

Kin , S. K. (2013). Timing performance enhance for routing channel in 28NM FPGA chip.

Chicago Style (17th ed.) Citation

Kin , Si Kee. Timing Performance Enhance for Routing Channel in 28NM FPGA Chip. 2013.

MLA引文

Kin , Si Kee. Timing Performance Enhance for Routing Channel in 28NM FPGA Chip. 2013.

警告：這些引文格式不一定是100％准確.