Design method to transmit and receive source synchronous signals using source asynchronous

Design method to transmit and receive source synchronous signals using source asynchronous

Field Programmable Gate Array (FPGA) yang berkos rendah menawarkan data dengan kelajuan terhad untuk saluran sumber segerak Low-Voltage Differential Signaling (LVDS) Input-Output (IO) tetapi kelajuan lebih tinggi untuk saluran sumber tidak segerak. Cyclone V adalah peranti berkos rendah yang menawar...

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書目詳細資料
主要作者:	Ramachandran, Nathan
格式:	Thesis
語言:	English
出版:	2013
主題:	TK5105 Computer networks and Data transmission systems TK7868.D5 Digital electronics and Electronic circuit design
在線閱讀:	http://eprints.usm.my/33021/1/NATHAN_RAMACHANDRAN_DESIGN_METHOD_TO_TRANSMIT_AND_RECEIVE_SOURCE_SYNCHRONOUS_SIGNALS_USING_SOURCE_ASYNCHRONOUS_TRANSCEIVER_CHANNELS_2013_MA_E%26E_BSB_24.pdf
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