Design method to transmit and receive source synchronous signals using source asynchronous

Field Programmable Gate Array (FPGA) yang berkos rendah menawarkan data dengan kelajuan terhad untuk saluran sumber segerak Low-Voltage Differential Signaling (LVDS) Input-Output (IO) tetapi kelajuan lebih tinggi untuk saluran sumber tidak segerak. Cyclone V adalah peranti berkos rendah yang menawar...

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Bibliographic Details
Main Author: Ramachandran, Nathan
Format: Thesis
Language:English
Published: 2013
Subjects:
Online Access:http://eprints.usm.my/33021/1/NATHAN_RAMACHANDRAN_DESIGN_METHOD_TO_TRANSMIT_AND_RECEIVE_SOURCE_SYNCHRONOUS_SIGNALS_USING_SOURCE_ASYNCHRONOUS_TRANSCEIVER_CHANNELS_2013_MA_E%26E_BSB_24.pdf
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