Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation

There are some concerns in silicon data collection by using the Design-For-Test (DFT). Bogus signal which carries ‘x’ value in simulation, results from the complex logic synthesis and power-up floating state can often mislead the fault isolation process with invalid failing condition. Besides, scan...

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Main Author:	Khor , Wooi Kin
Format:	Thesis
Language:	English
Published:	2017
Subjects:	TK1-9971 Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.usm.my/39412/1/Khor_Wooi_Kin_24_Pages.pdf
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id	my-usm-ep.39412
record_format	uketd_dc
spelling	my-usm-ep.394122019-04-12T05:25:06Z Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation 2017 Khor , Wooi Kin TK1-9971 Electrical engineering. Electronics. Nuclear engineering There are some concerns in silicon data collection by using the Design-For-Test (DFT). Bogus signal which carries ‘x’ value in simulation, results from the complex logic synthesis and power-up floating state can often mislead the fault isolation process with invalid failing condition. Besides, scan cells within the scan chain architecture is also having mismatch value in between the simulation data and silicon data due to the non-ideal mapping file passed down from the designer team. Hence, it is important to develop an integrated tool that can filter all the bogus signal online and to validate the correlation between silicon data and simulation data with minimum coverage of 90%. Data from actual Intel 6th generation microprocessor with 14 nm process technology, Skylake is imported to ensure that the application of this thesis in the current industry market. Necessary tools such as the “Differentiate and Display” feature to ease the analysis of data, the AND-logic operation to filter the bogus signal and X-OR logic operation to handle the inverted characteristic of signals are developed throughout the thesis. Results show that the developed integrated filter of bogus signals is successful and the minimum coverage of validation tool is 96.5%. Actual failure analysis case from industry is imported and the difference with and without the developed tools are compared. Inconclusive optical test result from the sample is obtained without the implementation of tools. On the other hand, defect of short circuit between the via and the metal line is found after the implementation of the developed tools. It is concluded that this thesis has achieved all the objectives set. 2017 Thesis http://eprints.usm.my/39412/ http://eprints.usm.my/39412/1/Khor_Wooi_Kin_24_Pages.pdf application/pdf en public masters Universiti Sains Malaysia Pusat Pengajian Kejuruteraan Elektrik dan Elektronik
institution	Universiti Sains Malaysia
collection	USM Institutional Repository
language	English
topic	TK1-9971 Electrical engineering Electronics Nuclear engineering
spellingShingle	TK1-9971 Electrical engineering Electronics Nuclear engineering Khor , Wooi Kin Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation
description	There are some concerns in silicon data collection by using the Design-For-Test (DFT). Bogus signal which carries ‘x’ value in simulation, results from the complex logic synthesis and power-up floating state can often mislead the fault isolation process with invalid failing condition. Besides, scan cells within the scan chain architecture is also having mismatch value in between the simulation data and silicon data due to the non-ideal mapping file passed down from the designer team. Hence, it is important to develop an integrated tool that can filter all the bogus signal online and to validate the correlation between silicon data and simulation data with minimum coverage of 90%. Data from actual Intel 6th generation microprocessor with 14 nm process technology, Skylake is imported to ensure that the application of this thesis in the current industry market. Necessary tools such as the “Differentiate and Display” feature to ease the analysis of data, the AND-logic operation to filter the bogus signal and X-OR logic operation to handle the inverted characteristic of signals are developed throughout the thesis. Results show that the developed integrated filter of bogus signals is successful and the minimum coverage of validation tool is 96.5%. Actual failure analysis case from industry is imported and the difference with and without the developed tools are compared. Inconclusive optical test result from the sample is obtained without the implementation of tools. On the other hand, defect of short circuit between the via and the metal line is found after the implementation of the developed tools. It is concluded that this thesis has achieved all the objectives set.
format	Thesis
qualification_level	Master's degree
author	Khor , Wooi Kin
author_facet	Khor , Wooi Kin
author_sort	Khor , Wooi Kin
title	Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation
title_short	Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation
title_full	Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation
title_fullStr	Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation
title_full_unstemmed	Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation
title_sort	fault isolation with ‘x’ filter for bogus signals and intensive scan cell sequence validation
granting_institution	Universiti Sains Malaysia
granting_department	Pusat Pengajian Kejuruteraan Elektrik dan Elektronik
publishDate	2017
url	http://eprints.usm.my/39412/1/Khor_Wooi_Kin_24_Pages.pdf
_version_	1747820750082932736

Fault Isolation with ‘X’ Filter for Bogus Signals and Intensive Scan Cell Sequence Validation

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