Digital Phase Locked-Loop With Wide Tuning Range And Dynamic Phase Shift
For decades, Phase Lock Loop (PLL) has been widely used in numerous systems, such as telecommunications and digital design, where it plays significant role in improving overall system timing. Moving forward, with the latest revolution towards System-on-chip technology (SOC), the need of PLL in the f...
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| 主要作者: | |
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| 格式: | Thesis |
| 語言: | English |
| 出版: |
2014
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| 主題: | |
| 在線閱讀: | http://eprints.usm.my/40885/1/ANAFAEZALENA_ROSLE_24_pages.pdf |
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