Tan , A. H. (2015). Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging.
Chicago Style (17th ed.) CitationTan , Ai Heong. Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging. 2015.
MLA引文Tan , Ai Heong. Modeling Of Vertical Side Chip Interconnect Technology For 3-Dimensional Packaging. 2015.
警告:这些引文格式不一定是100%准确.