New Cdc Design Tool For Analog Layout Workflow
The placement and routing on CMOS analog layout design had always been a time consuming and irritating process due to large amount of transistor devices placements, arrangements and a lot of critical nets routing constraint. Manual efforts to complete analog layout design took few weeks to months’ t...
Saved in:
主要作者: | |
---|---|
格式: | Thesis |
语言: | English |
出版: |
2015
|
主题: | |
在线阅读: | http://eprints.usm.my/40966/1/NG_HIN_MUNG_24_pages.pdf |
标签: |
添加标签
没有标签, 成为第一个标记此记录!
|