Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit

The purpose of this research is to create a solution for some of the obstacles faced during Integrated Circuit (IC) Failure Analysis (FA). Faults in ICs increase proportionally with the growing number of transistors, narrower process margins and increasing complexity of IC design. The IC industry de...

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Main Author:	Thor , Man Hon
Format:	Thesis
Language:	English
Published:	2015
Subjects:	TK7800-8360 Electronics
Online Access:	http://eprints.usm.my/40968/1/THOR_MAN_HON_24_pages.pdf
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id	my-usm-ep.40968
record_format	uketd_dc
spelling	my-usm-ep.409682018-07-10T08:43:09Z Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit 2015 Thor , Man Hon TK7800-8360 Electronics The purpose of this research is to create a solution for some of the obstacles faced during Integrated Circuit (IC) Failure Analysis (FA). Faults in ICs increase proportionally with the growing number of transistors, narrower process margins and increasing complexity of IC design. The IC industry depends heavily on FA to drive the time to market, yield and reliability learning, experiment evaluation and technology qualification. However, current FA flow is not straight forward and robust enough to solve every IC failure type, especially in solid failing cases. Therefore, a Laser Assisted Device Alteration (LADA) technique combined with Perl scripting that works on Automated Testing Equipment (ATE) is proposed in this study to solve the obstacles faced during FA. The said Perl script will act as a looping agent, test result comparator, triggering controller to enable LADA scanning and to find the sensitive transistor or circuit device towards the failure. Results from some actual case studies proved that the proposed technique can work with design as well as defect based failures, either through structural or functional tests which also needs consideration of specific sensitive circuitry within the IC design. As a conclusion, the contribution of the proposed technique is its ability to resolve solid failure problems in ICs, the capability to pin point the defective area to within a small region of up to a single transistor size and finally to simplify the entire FA process for a 3D FinFET System on Chip (SoC) IC. 2015 Thesis http://eprints.usm.my/40968/ http://eprints.usm.my/40968/1/THOR_MAN_HON_24_pages.pdf application/pdf en public masters Universiti Sains Malaysia Pusat Pengajian Kejuruteraan Elektrik dan Elektronik
institution	Universiti Sains Malaysia
collection	USM Institutional Repository
language	English
topic	TK7800-8360 Electronics
spellingShingle	TK7800-8360 Electronics Thor , Man Hon Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit
description	The purpose of this research is to create a solution for some of the obstacles faced during Integrated Circuit (IC) Failure Analysis (FA). Faults in ICs increase proportionally with the growing number of transistors, narrower process margins and increasing complexity of IC design. The IC industry depends heavily on FA to drive the time to market, yield and reliability learning, experiment evaluation and technology qualification. However, current FA flow is not straight forward and robust enough to solve every IC failure type, especially in solid failing cases. Therefore, a Laser Assisted Device Alteration (LADA) technique combined with Perl scripting that works on Automated Testing Equipment (ATE) is proposed in this study to solve the obstacles faced during FA. The said Perl script will act as a looping agent, test result comparator, triggering controller to enable LADA scanning and to find the sensitive transistor or circuit device towards the failure. Results from some actual case studies proved that the proposed technique can work with design as well as defect based failures, either through structural or functional tests which also needs consideration of specific sensitive circuitry within the IC design. As a conclusion, the contribution of the proposed technique is its ability to resolve solid failure problems in ICs, the capability to pin point the defective area to within a small region of up to a single transistor size and finally to simplify the entire FA process for a 3D FinFET System on Chip (SoC) IC.
format	Thesis
qualification_level	Master's degree
author	Thor , Man Hon
author_facet	Thor , Man Hon
author_sort	Thor , Man Hon
title	Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit
title_short	Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit
title_full	Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit
title_fullStr	Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit
title_full_unstemmed	Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit
title_sort	development of laser assisted device alteration (lada) technique for failure region identification in integrated circuit
granting_institution	Universiti Sains Malaysia
granting_department	Pusat Pengajian Kejuruteraan Elektrik dan Elektronik
publishDate	2015
url	http://eprints.usm.my/40968/1/THOR_MAN_HON_24_pages.pdf
_version_	1747820850276466688

Development Of Laser Assisted Device Alteration (Lada) Technique For Failure Region Identification In Integrated Circuit

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