Design Of Multiply-By-Two Amplifier For 1.5 Bit Pipelined Analogue-To-Digital Converter Application

Design Of Multiply-By-Two Amplifier For 1.5 Bit Pipelined Analogue-To-Digital Converter Application

This report explain about the design of multiply-by-two amplifier for Analogue-To-Digital Converter. The specification of the operational amplifier is 40dB of gain, and 1MHz cut-off frequency. Silterra 0.13um process technology is used in this work. The amplifier topology used in this research is Fo...

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書目詳細資料
主要作者:	Teng , Jin Chung
格式:	Thesis
語言:	English
出版:	2014
主題:	TK7800-8360 Electronics
在線閱讀:	http://eprints.usm.my/41078/1/TENG_JIN_CHUNG_24_Pages.pdf
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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