Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process

With the rapid growth of Very Large Scale Integration (VLSI) in complex designs, there is high demand for Design for Testability (DFT). Vast study has proven that Scan based testing is achieving good test coverage with lower cost and smaller die area and is widely used in the industry. Scan chain fa...

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Main Author:	Victor Paulraj, Eric Paulraj
Format:	Thesis
Language:	English
Published:	2016
Subjects:	TK7800-8360 Electronics
Online Access:	http://eprints.usm.my/41314/1/Eric_Paulraj_AL_Victor_Paulraj_24_Pages.pdf
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spelling	my-usm-ep.413142018-08-14T04:23:57Z Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process 2016 Victor Paulraj, Eric Paulraj TK7800-8360 Electronics With the rapid growth of Very Large Scale Integration (VLSI) in complex designs, there is high demand for Design for Testability (DFT). Vast study has proven that Scan based testing is achieving good test coverage with lower cost and smaller die area and is widely used in the industry. Scan chain fault diagnosis plays an important role as with the implementation of Scan based testing, it is reported that 10%-30% of defects in a Scan based design occurs within the Scan chain itself. Currently, there are three main types of stand-alone diagnosis models available, which are: software-based diagnosis, tester-based diagnosis and hardware-based diagnosis, where each has its disadvantages and limitations. In this project, the author proposed a hybrid Scan chain failure analysis technique that uses the proposed software-based diagnosis to obtain a list of possible failing suspect Scan cells, followed by the proposed tester-based diagnosis to further isolate the fault to a single failing device suspect. This proposed hybrid diagnosis algorithm ensures that Scan chain faults such as stuck-at and transition faults can be root-caused with lesser time and low complexity for both solid and marginal failures. Four case studies were successfully carried out to evaluate the proposed hybrid diagnosis algorithm on a 22nm fabrication process technology Device under Test (DUT) System-on-Chip (SOC) product, where the fault isolation was able to isolate a single failing device suspect for all four case studies, indicating a 100% fault isolation success rate. 2016 Thesis http://eprints.usm.my/41314/ http://eprints.usm.my/41314/1/Eric_Paulraj_AL_Victor_Paulraj_24_Pages.pdf application/pdf en public masters Universiti Sains Malaysia Pusat Pengajian Kejuruteraan Elektrik dan Elektronik
institution	Universiti Sains Malaysia
collection	USM Institutional Repository
language	English
topic	TK7800-8360 Electronics
spellingShingle	TK7800-8360 Electronics Victor Paulraj, Eric Paulraj Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process
description	With the rapid growth of Very Large Scale Integration (VLSI) in complex designs, there is high demand for Design for Testability (DFT). Vast study has proven that Scan based testing is achieving good test coverage with lower cost and smaller die area and is widely used in the industry. Scan chain fault diagnosis plays an important role as with the implementation of Scan based testing, it is reported that 10%-30% of defects in a Scan based design occurs within the Scan chain itself. Currently, there are three main types of stand-alone diagnosis models available, which are: software-based diagnosis, tester-based diagnosis and hardware-based diagnosis, where each has its disadvantages and limitations. In this project, the author proposed a hybrid Scan chain failure analysis technique that uses the proposed software-based diagnosis to obtain a list of possible failing suspect Scan cells, followed by the proposed tester-based diagnosis to further isolate the fault to a single failing device suspect. This proposed hybrid diagnosis algorithm ensures that Scan chain faults such as stuck-at and transition faults can be root-caused with lesser time and low complexity for both solid and marginal failures. Four case studies were successfully carried out to evaluate the proposed hybrid diagnosis algorithm on a 22nm fabrication process technology Device under Test (DUT) System-on-Chip (SOC) product, where the fault isolation was able to isolate a single failing device suspect for all four case studies, indicating a 100% fault isolation success rate.
format	Thesis
qualification_level	Master's degree
author	Victor Paulraj, Eric Paulraj
author_facet	Victor Paulraj, Eric Paulraj
author_sort	Victor Paulraj, Eric Paulraj
title	Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process
title_short	Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process
title_full	Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process
title_fullStr	Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process
title_full_unstemmed	Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process
title_sort	hybrid diagnosis model to determine fault isolation for scan chain failure analysis on 22nm fabrication process
granting_institution	Universiti Sains Malaysia
granting_department	Pusat Pengajian Kejuruteraan Elektrik dan Elektronik
publishDate	2016
url	http://eprints.usm.my/41314/1/Eric_Paulraj_AL_Victor_Paulraj_24_Pages.pdf
_version_	1747820908910739456

Hybrid Diagnosis Model To Determine Fault Isolation For Scan Chain Failure Analysis On 22nm Fabrication Process

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