Yusni, N. A. A. (2015). Technique Of Pvt Analysis On Sd Controller Timing Validation For 28nm Soc Fpga.
Chicago Style (17th ed.) CitationYusni, Nur Amalina Aiza. Technique Of Pvt Analysis On Sd Controller Timing Validation For 28nm Soc Fpga. 2015.
MLA (8th ed.) CitationYusni, Nur Amalina Aiza. Technique Of Pvt Analysis On Sd Controller Timing Validation For 28nm Soc Fpga. 2015.
Warning: These citations may not always be 100% accurate.