CFD Simulation Of Underfill Encapsulation Process In Flip Chip Packaging With Various Dispensing Methods
The major trend in electronic industry is to make the products smarter, lighter, functional and highly compact, at the same time cheaper. This trend has necessitated stringent packaging requirements and the flip-chip technology has emerged as a promising option to tackle this issue. However, a seri...
Saved in:
| Main Author: | |
|---|---|
| Format: | Thesis |
| Language: | English |
| Published: |
2010
|
| Subjects: | |
| Online Access: | http://eprints.usm.my/41905/1/KHOR_CHU_YEE.pdf |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | The major trend in electronic industry is to make the products smarter, lighter, functional and highly compact, at the same time cheaper. This trend has necessitated
stringent packaging requirements and the flip-chip technology has emerged as a promising option to tackle this issue. However, a serious issue in flip-chip packaging is the difference in the coefficient of thermal expansion between the silicon chip and the organic substrate, which generates thermo-mechanical stresses and causes fatigue
in solder joints. This problem is effectively solved by the underfill process in which
the space between the silicon die and the PCB is filled with the underfill encapsulant
that redistributes the induced stresses thereby enhancing the solder joints reliability. |
|---|