High Frequency Signaling Analysis Of Inter-Chip Package Routing For Multi-Chip Package
Multi-Chip Package (MCP) is becoming a customary form of integration in many high performance and advanced electronic devices. The vast adoptions of this technology are mainly contributed by the advantages for instance lower power consumption, heterogeneous integration of multiple silicon process te...
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my-usm-ep.452302019-08-09T07:36:35Z High Frequency Signaling Analysis Of Inter-Chip Package Routing For Multi-Chip Package 2013-07 Yong, Khang Choong TK1-9971 Electrical engineering. Electronics. Nuclear engineering Multi-Chip Package (MCP) is becoming a customary form of integration in many high performance and advanced electronic devices. The vast adoptions of this technology are mainly contributed by the advantages for instance lower power consumption, heterogeneous integration of multiple silicon process technologies and manufacturers, shorter time-to-market and lower costs. However, the high density inter-chip I/O routing within package will presents unique signaling challenges when coupled with high operating data rate. Tackling the right issue at early design stage is essential to avoid the pitfall of redesign. Thus, with the aim to establish the design guideline to enable high performance MCP channel, this research focuses on the signaling analysis of the inter-chip I/O package routing between silicon devices in MCP. In this study, signal quality and eye margin sensitivity were evaluated from 2.5 GHz up-to 7.5 GHz. The microwave effect is found dominating the transmission line component that resulted in signal quality deteriorations. Key limiting factors such as crosstalk coupling effects, signal reflections and frequency dependent losses that caused signal quality degradations were identified and categorized from 2.5 GHz to 7.5 GHz with channel length of 3 mm to 30 mm for future MCP design considerations. Moreover, various low power passive signaling enhancement techniques i.e. equalization and termination to mitigate the signal integrity challenges of the high speed on-package inter-chip channels has been analyzed. 2013-07 Thesis http://eprints.usm.my/45230/ http://eprints.usm.my/45230/1/Yong%20Khang%20Choong24.pdf application/pdf en public masters Universiti Sains Malaysia Pusat Pengajian Kejuruteraan Elektrik & Elektronik |
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Universiti Sains Malaysia |
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USM Institutional Repository |
| language |
English |
| topic |
TK1-9971 Electrical engineering Electronics Nuclear engineering |
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TK1-9971 Electrical engineering Electronics Nuclear engineering Yong, Khang Choong High Frequency Signaling Analysis Of Inter-Chip Package Routing For Multi-Chip Package |
| description |
Multi-Chip Package (MCP) is becoming a customary form of integration in many high performance and advanced electronic devices. The vast adoptions of this technology are mainly contributed by the advantages for instance lower power consumption, heterogeneous integration of multiple silicon process technologies and manufacturers, shorter time-to-market and lower costs. However, the high density inter-chip I/O routing within package will presents unique signaling challenges when coupled with high operating data rate. Tackling the right issue at early design stage is essential to avoid the pitfall of redesign. Thus, with the aim to establish the design guideline to enable high performance MCP channel, this research focuses on the signaling analysis of the inter-chip I/O package routing between silicon devices in MCP. In this study, signal quality and eye margin sensitivity were evaluated from 2.5 GHz up-to 7.5 GHz. The microwave effect is found dominating the transmission line component that resulted in signal quality deteriorations. Key limiting factors such as crosstalk coupling effects, signal reflections and frequency dependent losses that caused signal quality degradations were identified and categorized from 2.5 GHz to 7.5 GHz with channel length of 3 mm to 30 mm for future MCP design considerations. Moreover, various low power passive signaling enhancement techniques i.e. equalization and termination to mitigate the signal integrity challenges of the high speed on-package inter-chip channels has been analyzed. |
| format |
Thesis |
| qualification_level |
Master's degree |
| author |
Yong, Khang Choong |
| author_facet |
Yong, Khang Choong |
| author_sort |
Yong, Khang Choong |
| title |
High Frequency Signaling Analysis
Of Inter-Chip Package Routing
For Multi-Chip Package |
| title_short |
High Frequency Signaling Analysis
Of Inter-Chip Package Routing
For Multi-Chip Package |
| title_full |
High Frequency Signaling Analysis
Of Inter-Chip Package Routing
For Multi-Chip Package |
| title_fullStr |
High Frequency Signaling Analysis
Of Inter-Chip Package Routing
For Multi-Chip Package |
| title_full_unstemmed |
High Frequency Signaling Analysis
Of Inter-Chip Package Routing
For Multi-Chip Package |
| title_sort |
high frequency signaling analysis
of inter-chip package routing
for multi-chip package |
| granting_institution |
Universiti Sains Malaysia |
| granting_department |
Pusat Pengajian Kejuruteraan Elektrik & Elektronik |
| publishDate |
2013 |
| url |
http://eprints.usm.my/45230/1/Yong%20Khang%20Choong24.pdf |
| _version_ |
1747821473477689344 |