Accelerated Verilog Simulator Using Application Specific Microprocessor
Logic simulation is an important step in Very Large Scale Integration (VLSI) IC development. Advancement in Hardware Description Language (HDL) has made Verilog a widely adopted language used to model digital circuit and verification test bench. Electronic Design Automation (EDA) vendor provides...
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| Format: | Thesis |
| Language: | English |
| Published: |
2017
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| Online Access: | http://eprints.usm.my/45788/1/Accelerated%20Verilog%20Simulator%20Using%20Application%20Specific%20Microprocessor.pdf |
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