Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations

This thesis presents a modified Latency Insertion Method (LIM) that can be applied for signal and power integrity simulations of networks such as transmission lines, 2-D plane circuit model and multi-layered on-chip circuit model. LIM, as one of the transient analysis technique, is proven to be fast...

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Main Author:	Tan, Kin Hang
Format:	Thesis
Language:	English
Published:	2017
Subjects:	T Technology
Online Access:	http://eprints.usm.my/46477/1/Stability%20Improvement%20For%20The%20Latency%20Insertion%20Method%20Based%20On%20The%20Verlet%20Concept%20For%20Signal%20And%20Power%20Integrity%20Simulations.pdf
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spelling	my-usm-ep.464772021-11-17T03:42:14Z Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations 2017-11-01 Tan, Kin Hang T Technology TK1-9971 Electrical engineering. Electronics. Nuclear engineering This thesis presents a modified Latency Insertion Method (LIM) that can be applied for signal and power integrity simulations of networks such as transmission lines, 2-D plane circuit model and multi-layered on-chip circuit model. LIM, as one of the transient analysis technique, is proven to be fast and reliable for large networks simulation. However, due to the behaviour of the explicit formulation, which derived from the finite-difference time-domain (FDTD) technique, shared the same limitation of the time step size to maintain its numerical stability. This creates a problem, particularly in ill-constructed circuit where a small number of elements possess smaller parasitic inductances and capacitances which necessitate the need for extremely small time step size. In order to maintain the LIM stability, one must comply with the Courant-Friedrichs-Lewy (CFL) condition, limiting the time step size which basically depends on the smallest inductance and capacitance of the entire network. In this thesis, an innovative LIM with Verlet concept has been proposed with the intention to enhance LIM with unconditional stability without sacrificing much on its accuracy. The proposed method has been tested on three different circuit model and each model included an ill-constructed condition. All the simulations show that feasible results which is similar to that of the normal LIM can be obtained through the proposed method. This improved LIM method gives not only unconditional stability, but accuracy up to 90% on average with a time step size of 3 times larger than the maximum time step size of normal LIM. 2017-11 Thesis http://eprints.usm.my/46477/ http://eprints.usm.my/46477/1/Stability%20Improvement%20For%20The%20Latency%20Insertion%20Method%20Based%20On%20The%20Verlet%20Concept%20For%20Signal%20And%20Power%20Integrity%20Simulations.pdf application/pdf en public masters Universiti Sains Malaysia Pusat Pengajian Kejuruteraan Elektrik & Elektronik
institution	Universiti Sains Malaysia
collection	USM Institutional Repository
language	English
topic	T Technology T Technology
spellingShingle	T Technology T Technology Tan, Kin Hang Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations
description	This thesis presents a modified Latency Insertion Method (LIM) that can be applied for signal and power integrity simulations of networks such as transmission lines, 2-D plane circuit model and multi-layered on-chip circuit model. LIM, as one of the transient analysis technique, is proven to be fast and reliable for large networks simulation. However, due to the behaviour of the explicit formulation, which derived from the finite-difference time-domain (FDTD) technique, shared the same limitation of the time step size to maintain its numerical stability. This creates a problem, particularly in ill-constructed circuit where a small number of elements possess smaller parasitic inductances and capacitances which necessitate the need for extremely small time step size. In order to maintain the LIM stability, one must comply with the Courant-Friedrichs-Lewy (CFL) condition, limiting the time step size which basically depends on the smallest inductance and capacitance of the entire network. In this thesis, an innovative LIM with Verlet concept has been proposed with the intention to enhance LIM with unconditional stability without sacrificing much on its accuracy. The proposed method has been tested on three different circuit model and each model included an ill-constructed condition. All the simulations show that feasible results which is similar to that of the normal LIM can be obtained through the proposed method. This improved LIM method gives not only unconditional stability, but accuracy up to 90% on average with a time step size of 3 times larger than the maximum time step size of normal LIM.
format	Thesis
qualification_level	Master's degree
author	Tan, Kin Hang
author_facet	Tan, Kin Hang
author_sort	Tan, Kin Hang
title	Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations
title_short	Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations
title_full	Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations
title_fullStr	Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations
title_full_unstemmed	Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations
title_sort	stability improvement for the latency insertion method based on the verlet concept for signal and power integrity simulations
granting_institution	Universiti Sains Malaysia
granting_department	Pusat Pengajian Kejuruteraan Elektrik & Elektronik
publishDate	2017
url	http://eprints.usm.my/46477/1/Stability%20Improvement%20For%20The%20Latency%20Insertion%20Method%20Based%20On%20The%20Verlet%20Concept%20For%20Signal%20And%20Power%20Integrity%20Simulations.pdf
_version_	1747821680078618624

Stability Improvement For The Latency Insertion Method Based On The Verlet Concept For Signal And Power Integrity Simulations

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