Performance Evaluation Of Space Vector Modulation (SVM) For Multilevel Inverters
The Space Vector Modulation (SVM) technique has gained wide acceptance for many AC drive applications, due to a higher DC bus voltage utilization (higher output voltage compared with the Sinusoidal Pulse Width Modulation (SPWM)), lower harmonic distortions and easy digital realization. In recent yea...
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The Space Vector Modulation (SVM) technique has gained wide acceptance for many AC drive applications, due to a higher DC bus voltage utilization (higher output voltage compared with the Sinusoidal Pulse Width Modulation (SPWM)), lower harmonic distortions and easy digital realization. In recent years, the SVM technique was extensively adopted in multilevel inverters since it offers greater numbers of switching vectors for obtaining further improvements of AC drive performances. However, the use of multilevel
inverters associated with SVM increases the complexity of control algorithm (or computational burden), in obtaining proper switching sequences and vectors. The complexity of SVM computation causes a microcontroller or digital signal processor(DSP) to execute the computation at a larger sampling time. This consequently may produce errors in computation and hence degrades the control performances of AC motor drives. This thesis reports the performance evaluation of SVM for two-level of VSI, threelevel and five-level of Cascaded H-Bridge Multilevel Inverter (CHMI) and analyse indepth the accuracy performances of SVM computation and the performance evaluation in variable speed drive systems (i.e. Direct Torque Control (DTC) using SVM). The SVM modulator is implemented using a hybrid controller approach, i.e. with combination between the DS1104 Controller Board and FPGA. In such way, the computational burden can be minimized as the SVM tasks are distributed into two parts, in which every part is executed by a single controller. This allows the generation of switching gates performed by FPGA at the minimum sampling time |
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Sanusi, Syamim |
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Sanusi, Syamim |
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Sanusi, Syamim |
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Performance Evaluation Of Space Vector Modulation (SVM) For Multilevel Inverters |
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Performance Evaluation Of Space Vector Modulation (SVM) For Multilevel Inverters |
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Performance Evaluation Of Space Vector Modulation (SVM) For Multilevel Inverters |
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Performance Evaluation Of Space Vector Modulation (SVM) For Multilevel Inverters |
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Performance Evaluation Of Space Vector Modulation (SVM) For Multilevel Inverters |
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performance evaluation of space vector modulation (svm) for multilevel inverters |
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2016 |
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my-utem-ep.183832021-10-10T16:20:55Z Performance Evaluation Of Space Vector Modulation (SVM) For Multilevel Inverters 2016 Sanusi, Syamim T Technology (General) TK Electrical engineering. Electronics Nuclear engineering The Space Vector Modulation (SVM) technique has gained wide acceptance for many AC drive applications, due to a higher DC bus voltage utilization (higher output voltage compared with the Sinusoidal Pulse Width Modulation (SPWM)), lower harmonic distortions and easy digital realization. In recent years, the SVM technique was extensively adopted in multilevel inverters since it offers greater numbers of switching vectors for obtaining further improvements of AC drive performances. However, the use of multilevel inverters associated with SVM increases the complexity of control algorithm (or computational burden), in obtaining proper switching sequences and vectors. The complexity of SVM computation causes a microcontroller or digital signal processor(DSP) to execute the computation at a larger sampling time. This consequently may produce errors in computation and hence degrades the control performances of AC motor drives. This thesis reports the performance evaluation of SVM for two-level of VSI, threelevel and five-level of Cascaded H-Bridge Multilevel Inverter (CHMI) and analyse indepth the accuracy performances of SVM computation and the performance evaluation in variable speed drive systems (i.e. Direct Torque Control (DTC) using SVM). The SVM modulator is implemented using a hybrid controller approach, i.e. with combination between the DS1104 Controller Board and FPGA. In such way, the computational burden can be minimized as the SVM tasks are distributed into two parts, in which every part is executed by a single controller. This allows the generation of switching gates performed by FPGA at the minimum sampling time 2016 Thesis http://eprints.utem.edu.my/id/eprint/18383/ http://eprints.utem.edu.my/id/eprint/18383/1/Performance%20Evaluation%20Of%20Space%20Vector%20Modulation%20%28SVM%29%20For%20Multilevel%20Inverters.pdf text en public http://eprints.utem.edu.my/id/eprint/18383/2/Performance%20Evaluation%20Of%20Space%20Vector%20Modulation%20%28SVM%29%20For%20Multilevel%20Inverters.pdf text en validuser https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=100225 mphil masters Universiti Teknikal Malaysia Melaka Faculty of Electrical Engineering 1. Abu Bakar Siddique, H., Pai, A. P. & De Doncker, R. W. Adaptive Switching-Loss-Optimized Space-Vector Modulation For Three-Level Neutral-Point-Clamped Converters. Power Electronics and Applications (EPE'15 ECCE-Europe), 2015 17th European Conferenc,. pp.1-10. 2. Abu-Rub, H., Holtz, J., Rodriguez, J. & Ge, B. 2010. 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