Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers

A dissertation presented on the characterization and optimization of avalanche photodiodes fabricated by standard CMOS process (CMOS-APD) for high-speed photoreceivers, beginning with the theory and principle related to photodetector and avalanche photodiodes, followed by characterization,optimizati...

Full description

Saved in:

Bibliographic Details
Main Author:	Mohammed Napiah, Zul Atfyi Fauzan
Format:	Thesis
Language:	English
Published:	2017
Subjects:	T Technology (General)
Online Access:	http://eprints.utem.edu.my/id/eprint/19045/1/Characterization%20And%20Optimization%20Of%20Avalanche%20Photodiodes%20Fabricated%20By%20Standard%20CMOS%20Process%20For%20High-Speed%20Photoreceivers.pdf
Tags:	Add Tag No Tags, Be the first to tag this record!

id	my-utem-ep.19045
record_format	uketd_dc
institution	Universiti Teknikal Malaysia Melaka
collection	UTeM Repository
language	English
topic	T Technology (General) T Technology (General)
spellingShingle	T Technology (General) T Technology (General) Mohammed Napiah, Zul Atfyi Fauzan Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers
description	A dissertation presented on the characterization and optimization of avalanche photodiodes fabricated by standard CMOS process (CMOS-APD) for high-speed photoreceivers, beginning with the theory and principle related to photodetector and avalanche photodiodes, followed by characterization,optimization, and wavelength dependence of CMOS-APD, and finally link up with the transimpedance amplifier. nMOS-type and pMOS-type silicon avalanche photodiodes were fabricated by standard 0.18 μm CMOS process, and the currentvoltage characteristic and the frequency response of the CMOS-APDs with and without the guard ring structure were measured. CMOS-APDs have features of high avalanche gain below 10 V, wide bandwidth over 5 GHz, and easy integration with electronic circuits. In CMOS-APDs, guard ring structure is introduced for high-speed operation with the role of elimination the slow photo generated carriers in a deep layer and a substrate. The bandwidth of the CMOS-APD is enhanced with the guard ring structure at a sacrifice of the responsivity. Based on comparison of nMOS-type and pMOS-type APDs, the nMOS-type APD is more suitable for high-speed operation. The bandwidth is enhanced with decreasing the spacing of interdigital electrodes due to decreased carrier transit time and with decreasing the detection area and the PAD size for RF probing due to decreased device capacitance. Thus, an nMOS-type APD with the electrode spacing of 0.84 μm, the detection area of 10 x 10 μm², the PAD size for RF probing of 30 x 30 μm² along with the guard ring structure was fabricated. As a results, the maximum bandwidth of 8.4 GHz at the avalanche gain of about 10 and the gain-bandwidth product of 280 GHz were achieved. Furthermore, the wavelength dependence of the responsivity and the bandwidth of the CMOS-APDs with and without the guard ring structure also revealed. At a wavelength of 520 nm or less, there is no difference in the responsivity and the frequency response because all the illuminated light is absorbed in the p+-layer and the Nwell due to strong light absorption of Si. On the other hand, a part of the incident light is absorbed in the Psubstrate and the photo-generated carriers in the P-substrate are eliminated by the guard ring structure for the wavelength longer than 520 nm, and then bandwidth was remarkably enhanced at the sacrifice of the responsivity. In addition, to achieve high-speed photoreceivers, two types of TIA which are common-source and regulated-cascode TIAs were simulated by utilizing the output of the CMOSAPDs.The figure of merits of gain-bandwidth product was used to find the ideal results of the transimpedance gain and bandwidth performance due to trade-offs between both of them. The common-source TIA produced the transimpedance gain of 22.17 dBΩ, the bandwidth of 21.21 GHz and the gain-bandwidth product of 470.23 THz × dBΩ. Besides that, the simulated results of the regulated-cascade TIA configuration demonstrate 79.45 dBΩ transimpedance gain, 10.64 GHz bandwidth, and 845.35 THz × dBΩ gain-bandwidth product. Both of these TIA results meet the target of this research and further encouraging this successful CMOS-APDs to realize high-speed photoreceivers.
format	Thesis
qualification_name	Doctor of Philosophy (PhD.)
qualification_level	Doctorate
author	Mohammed Napiah, Zul Atfyi Fauzan
author_facet	Mohammed Napiah, Zul Atfyi Fauzan
author_sort	Mohammed Napiah, Zul Atfyi Fauzan
title	Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers
title_short	Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers
title_full	Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers
title_fullStr	Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers
title_full_unstemmed	Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers
title_sort	characterization and optimization of avalanche photodiodes fabricated by standard cmos process for high-speed high-speed photoreceivers
granting_institution	Universiti Teknikal Malaysia Melaka
granting_department	Faculty Of Engineering Electronic & Engineering Computer
publishDate	2017
url	http://eprints.utem.edu.my/id/eprint/19045/1/Characterization%20And%20Optimization%20Of%20Avalanche%20Photodiodes%20Fabricated%20By%20Standard%20CMOS%20Process%20For%20High-Speed%20Photoreceivers.pdf
_version_	1747833959327203328
spelling	my-utem-ep.190452021-01-05T16:27:42Z Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers 2017 Mohammed Napiah, Zul Atfyi Fauzan T Technology (General) TK Electrical engineering. Electronics Nuclear engineering A dissertation presented on the characterization and optimization of avalanche photodiodes fabricated by standard CMOS process (CMOS-APD) for high-speed photoreceivers, beginning with the theory and principle related to photodetector and avalanche photodiodes, followed by characterization,optimization, and wavelength dependence of CMOS-APD, and finally link up with the transimpedance amplifier. nMOS-type and pMOS-type silicon avalanche photodiodes were fabricated by standard 0.18 μm CMOS process, and the currentvoltage characteristic and the frequency response of the CMOS-APDs with and without the guard ring structure were measured. CMOS-APDs have features of high avalanche gain below 10 V, wide bandwidth over 5 GHz, and easy integration with electronic circuits. In CMOS-APDs, guard ring structure is introduced for high-speed operation with the role of elimination the slow photo generated carriers in a deep layer and a substrate. The bandwidth of the CMOS-APD is enhanced with the guard ring structure at a sacrifice of the responsivity. Based on comparison of nMOS-type and pMOS-type APDs, the nMOS-type APD is more suitable for high-speed operation. The bandwidth is enhanced with decreasing the spacing of interdigital electrodes due to decreased carrier transit time and with decreasing the detection area and the PAD size for RF probing due to decreased device capacitance. Thus, an nMOS-type APD with the electrode spacing of 0.84 μm, the detection area of 10 x 10 μm², the PAD size for RF probing of 30 x 30 μm² along with the guard ring structure was fabricated. As a results, the maximum bandwidth of 8.4 GHz at the avalanche gain of about 10 and the gain-bandwidth product of 280 GHz were achieved. Furthermore, the wavelength dependence of the responsivity and the bandwidth of the CMOS-APDs with and without the guard ring structure also revealed. At a wavelength of 520 nm or less, there is no difference in the responsivity and the frequency response because all the illuminated light is absorbed in the p+-layer and the Nwell due to strong light absorption of Si. On the other hand, a part of the incident light is absorbed in the Psubstrate and the photo-generated carriers in the P-substrate are eliminated by the guard ring structure for the wavelength longer than 520 nm, and then bandwidth was remarkably enhanced at the sacrifice of the responsivity. In addition, to achieve high-speed photoreceivers, two types of TIA which are common-source and regulated-cascode TIAs were simulated by utilizing the output of the CMOSAPDs.The figure of merits of gain-bandwidth product was used to find the ideal results of the transimpedance gain and bandwidth performance due to trade-offs between both of them. The common-source TIA produced the transimpedance gain of 22.17 dBΩ, the bandwidth of 21.21 GHz and the gain-bandwidth product of 470.23 THz × dBΩ. Besides that, the simulated results of the regulated-cascade TIA configuration demonstrate 79.45 dBΩ transimpedance gain, 10.64 GHz bandwidth, and 845.35 THz × dBΩ gain-bandwidth product. Both of these TIA results meet the target of this research and further encouraging this successful CMOS-APDs to realize high-speed photoreceivers. 2017 Thesis http://eprints.utem.edu.my/id/eprint/19045/ http://eprints.utem.edu.my/id/eprint/19045/1/Characterization%20And%20Optimization%20Of%20Avalanche%20Photodiodes%20Fabricated%20By%20Standard%20CMOS%20Process%20For%20High-Speed%20Photoreceivers.pdf text en public https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=102930 phd doctoral Universiti Teknikal Malaysia Melaka Faculty Of Engineering Electronic & Engineering Computer 1. T. K. Woodward and A. V. Krishnamoorthy, “1-Gb/s integrated optical detectors and receivers in commercial CMOS technologies,” IEEE J. Sel. Top. Quantum Electron., vol. 5, no. 2, pp. 146–156, 1999. 2. B. Yang, J. D. Schaub, S. M. Csutak, D. L. Rogers, and J. C. Campbell, “10- Gb/s all-silicon optical receiver,” IEEE Photonics Technol. Lett., vol. 15, no. 5, pp. 745–747, May 2003. 3. S. Radovanović, A. J. Annema, and B. Nauta, “A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication,” IEEE J. Solid-State Circuits, vol. 40, no. 8, pp. 1706–1717, 2005. 4. J. Sturm, M. Leifhelm, H. Schatzmayr, S. Groiß, and H. Zimmermann, “Optical Receiver IC for CD/DVD/Blue-Laser Application,” IEEE J. Solid- State Circuits, vol. 40, no. 7, pp. 1406–1413, 2005. 5. P. B. Espinasse and S. L. Kosier, “What’s in store for silicon photoreceivers?,” IEEE Circuits & Devices Magazine, no. March/April, pp. 23–31, 2004. 6. A. H. Chaghajerdi, “Sensing and Control in Optical Drives,” IEEE Control Systems Magazine, no. June, pp. 23–29, 2008. 7. S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, Third ed. John Wiley & Sons, 2007. 8. B. Ciftcioglu, L. Zhang, J. Zhang, J. R. Marciante, J. Zuegel, R. Sobolewski, and H. Wu, “Integrated Silicon PIN Photodiodes Using Deep N-Well in a Standard 0.18-μm CMOS Technology,” J. Light. Technol., vol. 27, no. 15, pp. 3303–3313, 2009. 9. J. Qi, C. L. Schow, L. D. Garrett, and J. C. Campbell, “A silicon NMOS monolithically integrated optical receiver,” IEEE Photonics Technol. Lett., vol. 9, no. 5, pp. 663–665, 1997. 10. J. D. Schaub, R. Li, S. M. Csutak, and J. C. Campbell, “High-speed monolithic silicon photoreceivers on high resistivity and SOI substrates,” J. Light. Technol., vol. 19, no. 2, pp. 272–278, 2001. 11. R. Li, J. D. Schaub, S. M. Csutak, and J. C. Campbell, “High-speed monolithic silicon photoreceiver fabricated on SOI,” IEEE Photonics Technol. Lett., vol. 12, no. 8, pp. 1046–1048, 2000. 12. T. Maruyama, K. Maekita, G. Li, and K. Iiyama, “High Speed Operation of SOI Pin Photodiodes Fabricated by CMOS Compatible Process,” in OptoElectronics and Communication Conference and Australian Conference on Optical Fibre Technology, 2014, no. July, pp. 506–508. 13. S. M. Csutak, J. D. Schaub, W. E. Wu, and J. C. Campbell, “High-speed monolithically integrated silicon optical receiver fabricated in 130-nm CMOS technology,” IEEE Photonics Technol. Lett., vol. 14, no. 4, pp. 516– 518, 2002. 14. C. Hermans and M. S. J. Steyaert, “A High-Speed 850-nm Optical Receiver Front-End in 0.18-μm CMOS,” IEEE J. Solid-State Circuits, vol. 41, no. 7, pp. 1606–1614, 2006. 15. D. Coppee, W. Pan, J. Stiens, R. Vounckx, and M. Kuijk, “Experimental study of the spatially-modulated light detector,” vol. 43, pp. 609–613, 1999. 16. C. Rooman, D. Coppée, and M. Kuijk, “Asynchronous 250-Mb/s optical receivers with integrated detector in standard CMOS technology for optocoupler applications,” IEEE J. Solid-State Circuits, vol. 35, no. 7, pp. 953–958, 2000. 17. F. Tavernier and M. S. J. Steyaert, “High-Speed Optical Receivers With Integrated Photodiode in 130 nm CMOS,” IEEE J. Solid-State Circuits, vol. 44, no. 10, pp. 2856–2867, 2009. 18. M. Jutzi, M. Grözing, E. Gaugler, W. Mazioschek, and M. Berroth, “2-Gb/s CMOS optical integrated receiver with a spatially modulated photodetector,” IEEE Photonics Technol. Lett., vol. 17, no. 6, pp. 1268– 1270, 2005. 19. D. Lee, J. Han, G. Han, and S. M. Park, “An 8.5-Gb/s Fully Integrated CMOS Optoelectronic Receiver Using Slope-Detection Adaptive Equalizer,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2861–2873, 2010. 20. H.-S. Kang, M.-J. Lee, and W.-Y. Choi, “Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process,” Appl. Phys. Lett., vol. 90, no. 15, p. 151118, 2007. 21. W.-K. Huang, Y.-C. Liu, and Y.-M. Hsin, “A High-Speed and High- Responsivity Photodiode in Standard CMOS Technology,” IEEE Photonics Technol. Lett., vol. 19, no. 4, pp. 197–199, Feb. 2007. 22. K. Iiyama, H. Takamatsu, and T. Maruyama, “Hole-Injection-Type and Electron-Injection-Type Silicon Avalanche Photodiodes Fabricated by Standard 0.18-μm CMOS Process,” IEEE Photonics Technol. Lett., vol. 22, no. 12, pp. 932–934, 2010. 23. M.-J. Lee, H. Rücker, and W.-Y. Choi, “Effects of guard-ring structures on the performance of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Electron Device Lett., vol. 33, no. 1, pp. 80–82, 2012. 24. S. R. Forrest, “Avalanche Photodiode with Floating Guard Ring,” 1989. [25] M. D. Kim, J. M. Baek, T. G. Kim, S. G. Kim, and K. S. Chung, “Characterization of double floating guard ring type InP-InGaAs avalanche photodiodes with Au/Zn low resistance ohmic contacts,” Thin Solid Films, vol. 514, pp. 250–253, 2006. 26. S. B. Alexander, Optical Communication Receiver Design. SPIE IEE, 1997. 27. M.-J. Lee and W.-Y. Choi, “Area-Dependent Photodetection Frequency Response Characterization of Silicon Avalanche Photodetectors Fabricated With Standard CMOS Technology,” IEEE Trans. Electron Devices, vol. 60, no. 3, pp. 998–1004, 2013. 28. J.-S. Youn, M.-J. Lee, K.-Y. Park, and W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC Receiver with a Silicon Avalanche Photodetector,” IEEE J. Quantum Electron., vol. 48, no. 2, pp. 229–236, 2012. 29. T. Shimotori, K. Maekita, T. Maruyama, and K. Iiyama, “Characterization of APDs fabricated by 0.18 μm CMOS process in blue wavelength region,” in 17th Optoelectronics and Communications Conference, 2012, pp. 509– 510. 30. M. A. Green, “Self-consistent optical parameters of intrinsic silicon at 300 K including temperature coefficients,” Sol. Energy Mater. Sol. Cells, vol. 92, no. 11, pp. 1305–1310, 2008. 31. B. Razavi, Design of Analog CMOS Integrated Circuit. McGraw-Hill Higher Education, 2001. 32. E. Sackinger and W. Guggenbuhl, “A High-Swing, High-Impedance MOS Cascode Circuit,” IEEE J. Solid-State Circuits, vol. 25, no. 1, pp. 289–298, 1990. 33. S. Bashiri, C. Plett, J. Aguirre, and P. Schvan, “A 40 Gb/s Transimpedance Amplifier in 65 nm CMOS,” in 2010 IEEE International Symposium on Circuits and Systems, 2010, pp. 757–760. 34. F.-P. Chou, C.-W. Wang, Z.-Y. Li, Y.-C. Hsieh, and Y.-M. Hsin, “Effect of Deep N-Well Bias in an 850-nm Si Photodiode Fabricated Using the CMOS Process,” IEEE Photonics Technol. Lett., vol. 25, no. 7, pp. 659–662, 2013. 35. P. Brandl, R. Enne, T. Jukic, and H. Zimmermann, “Monolithically integrated optical receiver with large-area avalanche photodiode in high76 voltage CMOS technology,” Electron. Lett., vol. 50, no. 21, pp. 1541–1543, 2014.

Characterization And Optimization Of Avalanche Photodiodes Fabricated By Standard Cmos Process For High-Speed High-Speed Photoreceivers

Similar Items