Improved field programmable gatearraybased accelerator of deep neural networkusing opencl
Being compute-intensive and memory expensive, it is hard to deploy Deep Neural Network (DNN) based models into the embedded devices. Despite recent studies that have shown the efforts to explore the Field Programmable Gate Array (FPGA) as an alternative to deploy DNN-based models such as AlexNet and...
Saved in:
Main Author: | Yap, June Wai |
---|---|
Format: | Thesis |
Language: | English English |
Published: |
2022
|
Online Access: | http://eprints.utem.edu.my/id/eprint/26977/1/Improved%20field%20programmable%20gatearraybased%20accelerator%20of%20deep%20neural%20networkusing%20opencl.pdf http://eprints.utem.edu.my/id/eprint/26977/2/Improved%20field%20programmable%20gatearraybased%20accelerator%20of%20deep%20neural%20networkusing%20opencl.pdf |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Field programmable gate array based convolution neural network hardware accelerator with optimized memory controller
by: Mohammed, Mohammed Isam Eldin Hassan
Published: (2020) -
An embedded system for networking security applying cryptographic acceleration in field programmable gate array hardware
by: Paramasivam, Vishnu
Published: (2009) -
Hardware-based biometric encryption implementation with Gauss-Jordan algorithm accelerator core in field programmable gate arrays
by: Liew, Tek Yee
Published: (2011) -
Acceleration Strategies For The Backpropagation
Neural Network Learning Algorithm
by: Zainuddin, Zarita
Published: (2001) -
Convolution and max pooling layer accelerator for convolutional neural network
by: Goh, Jinn Chyn
Published: (2020)