Simulation, fabrication and characterization of PMOS transistor device

In a low supply voltage CMOS technology, it is desirable to scale threshold voltage and gate length for improving circuit performance. Therefore, a project has been carried out inside KUiTTHO's microelectronic cleanroom to produce a method that has better l ow power/low voltage current concent...

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Main Author:	Yusuf, Siti Idzura
Format:	Thesis
Language:	English English English
Published:	2006
Subjects:	TK7800-8360 Electronics
Online Access:	http://eprints.uthm.edu.my/2230/1/SITI%20IDZURA%20BINTI%20YUSUF%20-%20declaration.pdf http://eprints.uthm.edu.my/2230/2/SITI%20IDZURA%20BINTI%20YUSUF%20-%2024p.pdf http://eprints.uthm.edu.my/2230/3/SITI%20IDZURA%20BINTI%20YUSUF%20-%20fulltext.pdf
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spelling	my-uthm-ep.22302021-10-31T04:36:13Z Simulation, fabrication and characterization of PMOS transistor device 2006-12 Yusuf, Siti Idzura TK7800-8360 Electronics In a low supply voltage CMOS technology, it is desirable to scale threshold voltage and gate length for improving circuit performance. Therefore, a project has been carried out inside KUiTTHO's microelectronic cleanroom to produce a method that has better l ow power/low voltage current concentrate on p-channel (PMOS). An experiment was also done to determine the right parameter value to b e used for fabrication process such as oxidation process thickness rate, sheet resistance and metal thickness. From the parameter value obtained, 0.3 m m and 0.5 mm PMOS transistor had been successfully produced. Fabrication simulation was performed to produce a 0.1 \|am and 0.3p.m PMOS transistor by using the ISE-TCAD software. The trade off between threshold voltage (VTH), gate length (LG) and thin oxide thickness (tox) are discussed to determine the characteristics of the transistors. It shows that for 0.3mm (toX = 860A) PMOS transistor the value of VT H =-3.33V and 0.5 mm ( t ^ = 910A), VT H value =-4.3V. From the simulation result show for 0.1 jim (to* = 200A), VT H = - 0 . 3 1 4V and for 0 . 5 \| im (400A) Vt h = -0.634V. The result shows that, with decreasing gate length and oxide thickness will produce lower value of threshold voltage. Minimum value of threshold voltage can result in a better performance of transistor. Another parameter must be taken into consideration such as leakage current, resistivity and conductivity to get a better design of PMOS transistor in future research. 2006-12 Thesis http://eprints.uthm.edu.my/2230/ http://eprints.uthm.edu.my/2230/1/SITI%20IDZURA%20BINTI%20YUSUF%20-%20declaration.pdf text en staffonly http://eprints.uthm.edu.my/2230/2/SITI%20IDZURA%20BINTI%20YUSUF%20-%2024p.pdf text en public http://eprints.uthm.edu.my/2230/3/SITI%20IDZURA%20BINTI%20YUSUF%20-%20fulltext.pdf text en validuser mphil masters Universiti Tun Hussein Onn Malaysia Faculty of Electrical and Electronic Engineering
institution	Universiti Tun Hussein Onn Malaysia
collection	UTHM Institutional Repository
language	English English English
topic	TK7800-8360 Electronics
spellingShingle	TK7800-8360 Electronics Yusuf, Siti Idzura Simulation, fabrication and characterization of PMOS transistor device
description	In a low supply voltage CMOS technology, it is desirable to scale threshold voltage and gate length for improving circuit performance. Therefore, a project has been carried out inside KUiTTHO's microelectronic cleanroom to produce a method that has better l ow power/low voltage current concentrate on p-channel (PMOS). An experiment was also done to determine the right parameter value to b e used for fabrication process such as oxidation process thickness rate, sheet resistance and metal thickness. From the parameter value obtained, 0.3 m m and 0.5 mm PMOS transistor had been successfully produced. Fabrication simulation was performed to produce a 0.1 \|am and 0.3p.m PMOS transistor by using the ISE-TCAD software. The trade off between threshold voltage (VTH), gate length (LG) and thin oxide thickness (tox) are discussed to determine the characteristics of the transistors. It shows that for 0.3mm (toX = 860A) PMOS transistor the value of VT H =-3.33V and 0.5 mm ( t ^ = 910A), VT H value =-4.3V. From the simulation result show for 0.1 jim (to* = 200A), VT H = - 0 . 3 1 4V and for 0 . 5 \| im (400A) Vt h = -0.634V. The result shows that, with decreasing gate length and oxide thickness will produce lower value of threshold voltage. Minimum value of threshold voltage can result in a better performance of transistor. Another parameter must be taken into consideration such as leakage current, resistivity and conductivity to get a better design of PMOS transistor in future research.
format	Thesis
qualification_name	Master of Philosophy (M.Phil.)
qualification_level	Master's degree
author	Yusuf, Siti Idzura
author_facet	Yusuf, Siti Idzura
author_sort	Yusuf, Siti Idzura
title	Simulation, fabrication and characterization of PMOS transistor device
title_short	Simulation, fabrication and characterization of PMOS transistor device
title_full	Simulation, fabrication and characterization of PMOS transistor device
title_fullStr	Simulation, fabrication and characterization of PMOS transistor device
title_full_unstemmed	Simulation, fabrication and characterization of PMOS transistor device
title_sort	simulation, fabrication and characterization of pmos transistor device
granting_institution	Universiti Tun Hussein Onn Malaysia
granting_department	Faculty of Electrical and Electronic Engineering
publishDate	2006
url	http://eprints.uthm.edu.my/2230/1/SITI%20IDZURA%20BINTI%20YUSUF%20-%20declaration.pdf http://eprints.uthm.edu.my/2230/2/SITI%20IDZURA%20BINTI%20YUSUF%20-%2024p.pdf http://eprints.uthm.edu.my/2230/3/SITI%20IDZURA%20BINTI%20YUSUF%20-%20fulltext.pdf
_version_	1747830927732506624

Simulation, fabrication and characterization of PMOS transistor device

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