Simulation, fabrication and characterization of PMOS transistor device - Yusuf, Siti Idzura (2006)
In a low suppl y voltage CMO S technology , it is desirabl e to scal e threshold voltage and gate length for improvin g circuit performance . Therefore , a projec t ha s been carried out inside KUiTTHO's microelectroni c cleanroom to produc e a metho d that ha s bette r low power/low voltage current concentrat e on p-channe l (PMOS). A n experimen t w a s also don e to determin e the right paramete r value to b e use d for fabrication process such as oxidation process thickness rate, shee t resistanc e and meta l thickness. From the paramete r value obtained, 0.3 m m an d 0.5 m m PMO S transistor ha d bee n successfully produced . Fabrication simulation wa s performe d to produc e a 0.1 |am an d 0.3p.m PMO S transistor by using the ISE-TCA D software . Th e trade off betwee n threshold voltage (VTH), gat e length (LG) and thin oxide thickness (t o x ) are discusse d to determin e the characteristics of the transistors. It show s that for 0.3mm (toX = 860A ) PMO S transistor the value of VT H =-3.33V and 0.5 m m (t ^ = 910A), V T H value =-4.3V. From the simulation result show for 0.1 jim (to* = 200A), VT H = -0.314V an d for 0.5|im (400A) Vt h = -0.634V. Th e result shows that, with decreasin g gat e length an d oxide thickness will produc e lowe r value of threshold voltage . Minimu m value of threshold voltage can result in a better performanc e of transistor. Anothe r paramete r must b e taken into consideration such as leakage current, resistivity and conductivity to get a better design of PMO S transistor in futur e research.