Simulation, fabrication and characterization of PMOS transistor device
In a low suppl y voltage CMO S technology , it is desirabl e to scal e threshold voltage and gate length for improvin g circuit performance . Therefore , a projec t ha s been carried out inside KUiTTHO's microelectroni c cleanroom to produc e a metho d that ha s bette r low power/low volt...
Saved in:
| 主要作者: | |
|---|---|
| 格式: | Thesis |
| 語言: | English English English |
| 出版: |
2006
|
| 主題: | |
| 在線閱讀: | http://eprints.uthm.edu.my/7120/1/24p%20SITI%20IDZURA%20YUSUF.pdf http://eprints.uthm.edu.my/7120/2/SITI%20IDZURA%20YUSUF%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/7120/3/SITI%20IDZURA%20YUSUF%20WATERMARK.pdf |
| 標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|