Simulation, fabrication and characterization of PMOS transistor device
In a low suppl y voltage CMO S technology , it is desirabl e to scal e threshold voltage and gate length for improvin g circuit performance . Therefore , a projec t ha s been carried out inside KUiTTHO's microelectroni c cleanroom to produc e a metho d that ha s bette r low power/low volt...
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| Format: | Thesis |
| Language: | English English English |
| Published: |
2006
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| Online Access: | http://eprints.uthm.edu.my/7120/1/24p%20SITI%20IDZURA%20YUSUF.pdf http://eprints.uthm.edu.my/7120/2/SITI%20IDZURA%20YUSUF%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/7120/3/SITI%20IDZURA%20YUSUF%20WATERMARK.pdf |
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