Simulation studies of 30 MHz phase-locked loop coherent receiver

Phase-Locked Loop or in short PLL is a vital part in electronics system mainly in communication system in getting back the transmitted signal. As a whole, it is basically a closed loop frequency control system where its function is based on the phase sensitive detection of phase difference bet...

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Main Author: Abdul Wahab, Fauzi
Format: Thesis
Language:English
English
English
Published: 2005
Subjects:
Online Access:http://eprints.uthm.edu.my/7645/1/24p%20FAUZI%20ABDUL%20WAHAB.pdf
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spelling my-uthm-ep.76452022-09-08T02:17:03Z Simulation studies of 30 MHz phase-locked loop coherent receiver 2005-04 Abdul Wahab, Fauzi TK Electrical engineering. Electronics Nuclear engineering TK7800-8360 Electronics Phase-Locked Loop or in short PLL is a vital part in electronics system mainly in communication system in getting back the transmitted signal. As a whole, it is basically a closed loop frequency control system where its function is based on the phase sensitive detection of phase difference between the input signal (transmitted signal) and the output of the controlled oscillation. Although the system had been around since 1930's, implemented by the French Engineer, H. De Bellescise, but still, until today further development is in progress in achieving better response and performance in retrieving and synchronising transmitted signals. The purpose of this project is to familiarise in designing and constructing a 30 MHz Phase-Locked Loop Coherent Receiver by computer simulation, taking account the requirements for each building block of a PLL system, the stability of the system and the response of the system. To achieve this, the process includes simple and direct calculations, and circuit simulations observation. Results are represented in graphs and are analysed. 2005-04 Thesis http://eprints.uthm.edu.my/7645/ http://eprints.uthm.edu.my/7645/1/24p%20FAUZI%20ABDUL%20WAHAB.pdf text en public http://eprints.uthm.edu.my/7645/2/FAUZI%20ABDUL%20WAHAB%20COPYRIGHT%20DECLARATION.pdf text en staffonly http://eprints.uthm.edu.my/7645/3/FAUZI%20ABDUL%20WAHAB%20WATERMARK.pdf text en validuser mphil masters Kolej Universiti Teknologi Tun Hussein Onn Fakulti Kejuruteraan Elektrik dan Elektronik
institution Universiti Tun Hussein Onn Malaysia
collection UTHM Institutional Repository
language English
English
English
topic TK Electrical engineering
Electronics Nuclear engineering
TK7800-8360 Electronics
spellingShingle TK Electrical engineering
Electronics Nuclear engineering
TK7800-8360 Electronics
Abdul Wahab, Fauzi
Simulation studies of 30 MHz phase-locked loop coherent receiver
description Phase-Locked Loop or in short PLL is a vital part in electronics system mainly in communication system in getting back the transmitted signal. As a whole, it is basically a closed loop frequency control system where its function is based on the phase sensitive detection of phase difference between the input signal (transmitted signal) and the output of the controlled oscillation. Although the system had been around since 1930's, implemented by the French Engineer, H. De Bellescise, but still, until today further development is in progress in achieving better response and performance in retrieving and synchronising transmitted signals. The purpose of this project is to familiarise in designing and constructing a 30 MHz Phase-Locked Loop Coherent Receiver by computer simulation, taking account the requirements for each building block of a PLL system, the stability of the system and the response of the system. To achieve this, the process includes simple and direct calculations, and circuit simulations observation. Results are represented in graphs and are analysed.
format Thesis
qualification_name Master of Philosophy (M.Phil.)
qualification_level Master's degree
author Abdul Wahab, Fauzi
author_facet Abdul Wahab, Fauzi
author_sort Abdul Wahab, Fauzi
title Simulation studies of 30 MHz phase-locked loop coherent receiver
title_short Simulation studies of 30 MHz phase-locked loop coherent receiver
title_full Simulation studies of 30 MHz phase-locked loop coherent receiver
title_fullStr Simulation studies of 30 MHz phase-locked loop coherent receiver
title_full_unstemmed Simulation studies of 30 MHz phase-locked loop coherent receiver
title_sort simulation studies of 30 mhz phase-locked loop coherent receiver
granting_institution Kolej Universiti Teknologi Tun Hussein Onn
granting_department Fakulti Kejuruteraan Elektrik dan Elektronik
publishDate 2005
url http://eprints.uthm.edu.my/7645/1/24p%20FAUZI%20ABDUL%20WAHAB.pdf
http://eprints.uthm.edu.my/7645/2/FAUZI%20ABDUL%20WAHAB%20COPYRIGHT%20DECLARATION.pdf
http://eprints.uthm.edu.my/7645/3/FAUZI%20ABDUL%20WAHAB%20WATERMARK.pdf
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