FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
External devices such as modems and other computers need to communicate serially. In order to provide this communication, a universal asynchronous receiver�transmitter (UARn can provide an asynchronous serial data communication with I/O outputs devices such as keyboard, mouse or keypad. It can t...
Saved in:
| 主要作者: | |
|---|---|
| 格式: | Thesis |
| 語言: | English English English |
| 出版: |
2005
|
| 主題: | |
| 在線閱讀: | http://eprints.uthm.edu.my/7699/1/24p%20NABIHAH%20%40%20NORNABIHAH%20AHMAD.pdf http://eprints.uthm.edu.my/7699/2/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/7699/3/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20WATERMARK.pdf |
| 標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
| 總結: | External devices such as modems and other computers need to communicate
serially. In order to provide this communication, a universal asynchronous receiver�transmitter (UARn can provide an asynchronous serial data communication with I/O
outputs devices such as keyboard, mouse or keypad. It can transmit serial data on over
it's transmit line (TxD) and receive serial data over it's receive line (RxD). This project
describes a universal asynchronous receiver-transmitter (UART) design. It is design
from Very High Speed Integrated Circuit Hardware Description Language (VHDL)
description, and then to Field Programmable Gate Array (FPGA) implementation.
VHDL is used to provide a simple way of design entry through behavioral description.
This project covers VHDL integration issue involved in the flow from high-level
description to a fully simulated and synthesized. FPGA University Program Educational
Board (UP2) is used to achieve fast prototype build and logic circuit verification. Then
analysis the features of other existing UART technology design. |
|---|