Interactive graphical user interface for incentive spirometer
Incremental Decremental Support Vector Machine (IDSVM) is one of the widely used incremental learning algorithms known for its high accuracy for data stream analytics and high computational complexity. One of the biggest problems of IDSVM is that the model scales with the input data set size that di...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English |
| Published: |
2022
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/102154/1/JeevanSirkunanPSKE2022.pdf.pdf |
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| Summary: | Incremental Decremental Support Vector Machine (IDSVM) is one of the widely used incremental learning algorithms known for its high accuracy for data stream analytics and high computational complexity. One of the biggest problems of IDSVM is that the model scales with the input data set size that directly correlates with the computational and memory resources. In order to deploy IDSVM in an embedded system with limited memory, a moving windowarchitecture is needed to limit the kernel sizes. However, this also increases the overall complexity of the algorithm since each data instance needs to be unlearned when exiting the window. This thesis proposes an Interleaved IDSVM (IIDSVM) algorithm that performs incremental and decremental learning concurrently. The interleaved method can reduce the overall kernel size and consume less memory. This thesis also proposes a reduced-division IIDSVMalgorithm that replaces the more complex division operations with simpler inverse multiplications. Certain IIDSVM tasks can be simplified by replacing most of the complex divisions with inverse multiplication that can achieve a similar outcome since only a single sample variation value is used to update the weights.Finally, a Radial Basis Function (RBF) kernel, which is a widely used kernel in SVM, is proposed to be implemented as a hardware accelerator to speed up the computation time of the IIDSVM. Based on our experiments, the proposed IIDSVM achieved a speedup of 2.5 - 4.2× on computation time while producing similar accuracy as IDSVM and LIBSVM. Furthermore, the reduced-division IIDSVM can improve computation time up to 1.4× on a Nios II embedded platform for certain data sets. The RBF kernel’s hardware implementation is analyzed on the Stratix V Field Programmable Gate Array (FPGA) platform. It can perform up to four orders of magnitude faster than the software implementation on the Nios II embedded processor for data sets with 8, 12, and 16 feature sizes. Besides that, the proposed architecture RBF kernel can maintain a maximum operating frequency of approximately 200Mhz for feature sizes 8, 12, and 16. Collectively the proposed works can improve the runtime of incremental SVM compute-intensive data stream analytics. |
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